ARCHITECTURES: Digital synthesis enables complete clock control

Ron Wilson
(08/15/2005 9:00 AM EDT)
URL: http://www.eetimes.com/showArticle.jhtml?articleID=168600723

Fremont, Calif. — Clock generation is a growing problem for many embedded systems. The problem isn't the clocks themselves, but the radical things designers do to manage power. New CPUs, and many advanced systems-on-chip at 130 nanometers and beyond, require dynamic shifting of operating voltages and clock frequencies, often block by block.

The clock generator must therefore provide a wide range of frequencies in small enough increments that on-chip phase-locked loops can restore lock quickly. It may also require shifts in duty cycle as the frequency changes — and PLLs do not shift quickly or gracefully.

But an alternative approach to clock generation has been around for years, having been applied first by Oak Technology Inc. and then by Zoran Corp. in laser diode control applications. A reference clock is fed through a digital delay line, generating multiple signals from multiple taps, each offset by a precise amount. Configurable logic then combines the clocks, letting the designer place the rising and falling edges at any 100-picosecond interval.

A second stage provides a vernier function, tracking a ring oscillator that in effect subdivides the 100-ns intervals into 3-ps fine intervals. Using the digital synthesizer, the designer can position the rising and falling edges arbitrarily with 3-ps accuracy. Changes in frequency or duty cycle are accomplished by changing the digital function of the synthesizer.

Such a synthesizer allows on-the-fly shifting of clock frequency without halting execution to allow on-chip PLLs to relock. Indeed, the frequency can be shifted so gradually that lock is never lost in the first place. "We can shift a 200-MHz CPU between 210 MHz and 90 MHz without causing a crash, while lowering all the other motherboard clocks simultaneously," said Carlos Bielicki, president and CEO of Zoran spin-off TimeLab Corp., current holder of the patents on the technology.

TimeLab has chosen the PC motherboard market as its first target and has accordingly produced a pair of chips: the TLC2801, for desktops, and the TLC2811, for notebooks. Each provides six independent digital clock synthesizers, allowing one device to control all of the various, often asynchronous clocks on the motherboard without imposing ratio relationships on the clocks. The initial chips are specific to Intel's differential clock distribution standard.

The chips are sampling now. In quantities of 10,000, they will sell for $2.50 and $3.50 each, respectively.