Inside Architect Labs’ Two-Week Chip Design

By Alan Patterson, EE Times | September 11, 2026

Architect Labs is building a platform that lets “anybody” design a custom chip, co-founder Ebrahim Hussain told EE Times in an exclusive interview. Supporting that claim, the startup company has built its prototype Redwood chip on an FPGA in record time.

“Redwood is the first demonstration that is saying this flow works,” Hussain said. “We can actually take something from idea to at least a proof-of-concept. I don’t think you can get any quicker than two weeks.”

That speed includes success on the first batch of test chips from a foundry, known as “A0” silicon. Architect Labs has been using TSMC’s wafer shuttle service that allows multiple chip designs to share a single mask set and production run.

“It’s getting very difficult to build complex A0 silicon on the first shot,” Hussain noted. “We want to help chip companies make it faster but [also] make their development higher quality. The end goal is that A0 goes into full production for our partners.”

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