Andes Technology has shut down Condor Computing
Condor flies no more
How an Austin start-up set out to push RISC-V into the data center but fell short.
By David Harold, John Peddie Reasearch
Andes Technology has shut down Condor Computing. Condor had been intended to push Andes into data-center-class RISC-V with an RVA23-based licensable core built around an unconventional time-based scheduling architecture. The IP now returns to Andes. The closure is a setback for Andes’ high-end ambitions and for RISC-V’s effort to establish credible alternatives to Arm and x86 in the data center.
To read the full article, click here
Related Semiconductor IP
- RVA23, Multi-cluster, Hypervisor and Android
- 32-bit 8-stage superscalar processor that supports RISC-V specification, including GCNP and Linux
- 64-Bit 8-stage superscalar RISC-V processor
- Compact High-Speed 32-bit CPU for Real-time and Linux Applications
- Compact High-Speed 64-bit CPU for Real-time and Linux Applications
Related News
- Andes Technology Advances High-Performance RISC-V Strategy with U.S.-based Design Center: Condor Computing
- Andes Technology and TetraMem Collaborate to Build Groundbreaking AI Accelerator Chip with Analog In-Memory Computing
- Andes Technology Launches RISC-V Now! — A Global Conference Series Focused on Commercial, Production-Scale RISC-V
- Phison Selects Andes RISC-V Cores for its First aiDAPTIV+ AI Solution, Marking a Major Milestone in AI Architecture
Latest News
- Alliance for Open Media Sees Rapid AV2 Adoption Across the Video Ecosystem Just Four Months After Release
- Rambus and ChipAgents Collaborate to Accelerate Chip Design with Agentic AI
- Server CPU Shipments Projected to Grow Over 40% YoY in 2027, with Arm-Based Products Continuing to Gain Market Share
- UMC and AP Memory Collaborate to Enable Advanced Power Delivery Solutions for AI and HPC Systems
- Cadence AI Super Agents Enable Nokia to Accelerate Electronic System Design on Millennium M2000 Supercomputer