Altera Endorses Summit Design's Visual IP as the Platform for Delivering Protected Simulation Models for Its IP MegaCore Functions
IP News
Altera Endorses Summit Design's Visual IP as the Platform for Delivering Protected Simulation Models for Its IP MegaCore Functions
BEAVERTON, Ore.----Jan. 12, 2000--Summit Design, Inc. today announced that Altera Corporation has selected Visual IP(TM) as the tool for protecting and distributing its MegaCore(TM) simulation models. Visual IP will allow Altera to provide high-performance VHDL and Verilog behavioral models for its catalog of highly parameterizable, reusable megafunctions. Visual IP streamlines intellectual property (IP) evaluation, interface debugging, and integration of IP blocks into designs by allowing engineers to quickly explore, with a high degree of model interactivity, the behavior of the IP using one of a number of supported simulation environments, or working stand-alone.
Altera's MegaCore functions offer a set of IP cores that have been optimized for performance and density. Together with easy to use, GUI-based MegaWizard(TM) Plug-ins, customers have the ability to specify megafunction parameters to meet system requirements. This significantly shortens time to market by eliminating the need for designing custom functions. By using Visual IP, Altera can offer a flow in which megafunction blocks are parameterized and then seamlessly integrated and verified within the end user's design environments. This will improve the evaluation of MegaCore models and facilitate their use throughout Altera's broad customer base.
``With Visual IP, we can now address the need for distributing fully protected versions of the MegaCore functions, while providing essential parameterization and timing capabilities,'' said Justin Cowling, Altera senior IP marketing manager. ``Visual IP will allow us to compile and verify a single model that can be utilized in all our customers' environments, thereby dramatically reducing our maintenance and verification efforts. This will result in a significantly shortened turn-around cycle for delivering our IP technology. We have found both the technology and the business model built around it to best address our needs.''
Visual IP compiles HDL source code, together with pertinent design, verification, and documentation data, into a binary object which provides critical design information such as access to selected internal registers, SDF timing shells, and test. These capabilities meet the needs of MegaCore functions, which are used in complex system architectures in various application areas. ``Altera's set of MegaCore functions is a key technology in the rapidly growing arena of programmable logic integration in complex designs and systems, and provides designers access to state-of-the-art IP functionality and synthesis optimization,'' said Rich Davenport, president and COO of Summit Design. ``We are very pleased to have Altera, with its high visibility in the programmable logic market, as a strategic partner for our Visual IP technology.''
About Altera
Altera Corporation, The Programmable Solutions Company(TM), was founded in 1983 and is a leading supplier of programmable logic devices and associated logic development software tools. Programmable logic devices are semiconductor chips that can be programmed on-site, using software tools that run on personal computers or engineering workstations. User benefits include ease of use, lower risk, and fast time-to-market. Altera's CMOS-based programmable logic devices address high-speed, high-density and low-power applications in the telecommunications, data communications, computer peripheral, and industrial markets. Altera common stock is traded on the Nasdaq Stock Market under the symbol ALTR. More information on Altera can be obtained on the Internet at http://www.altera.com. About Summit Design Summit Design, Inc. is a leading international supplier of engineering software products in the areas of high-level design creation, analysis and verification. The world's top electronics companies use Summit products to increase engineering productivity, reduce development time, and improve the quality of their products. Summit is located at 9305 S.W. Gemini Drive, Beaverton, Ore., 97008; (503) 643-9281; http://www.summit-design.com.
Related Semiconductor IP
- nQrux® Root of Trust IP
- AXI to UCIe Bridge IP
- UCIe 2.x Controller IP
- SWI3S (SoundWire I3S Interface) Peripheral Controller Core IP
- OpenTitan-based RISC-V Secure Element
Related News
- Andes Technology and Mirabilis Design Announce Collaboration on System-Level Models for Andes RISC-V Processor IP
- DCD-SEMI expands CryptOne with EdDSA Curve25519 IP core for secure embedded systems
- M31 Collaborates with TSMC to Achieve Tapeout of eUSB2V2 on N2P Process, Advancing Design IP Ecosystem
- Mythic Acquires Videantis, One of Europe’s Leading Digital Processor IP Companies, to Build the World’s Most Energy-Efficient AI Compute Platform
Latest News
- Year-to-Date Global Semiconductor Sales Top $1 Trillion Through August
- Xiphera launches nQrux® Root of Trust with Post-Quantum Cryptography
- Skyechip Joins Rapidus Core Ecosystem, Bringing Advanced Silicon IP For AI and HPC to Japan's 2nm Platform
- GUC Monthly Sales Report – September 2026
- Rapidus Unveils “Rapidus CORE”, New Global Ecosystem Framework Supporting the Development and Mass Production of Cutting-Edge Semiconductors