Agentic AI, Multi‑Physics, and Standards Will Redefine Chips Design
In this roundup from DAC 2026 in Long Beach, California, we examine some of the underlying themes behind the agentic AI trend that is sweeping the industry.
By Nitin Dahad, EE Times | August 11, 2026

If DAC 2025 was about agentic AI arriving in electronic design, DAC 2026 was about making it work in the reality of silicon‑to‑systems engineering. Across the show floor and executive interviews, three themes dominated: agentic AI as the new automation layer, multi‑physics as the defining bottleneck, and standards as the glue that will make it all interoperable at scale.
It was also a year in which EDA veterans started talking seriously about unconventional compute and quantum computing as part of the longer‑term path to keep engineering progress from stalling under its own power and complexity demands.
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