Why Analog Design Challenges Need Breakthrough Technologies

By Synopsys, Inc.

May 6, 2024

As demand for semiconductors continues to rise, analog IC design engineers are struggling to solve great challenges including migrating analog IP across technology nodes and achieving new power and performance metrics that, for so long, seemed impossible. Increasingly, AI technologies are helping the industry solve what used to be unsolvable tasks. Can the same be applied to the analog side of designs?

At this year’s SNUG Silicon Valley 2024 conference, technology leaders shared their perspectives during a panel discussion, “Unsolvable Analog Design Challenges Need Breakthrough Technologies.” As analog designs march toward angstroms, design rules become more complicated. New transistor devices, such as FinFETs, gate-all-around (GAA), and complementary FETs (CFETs), present fresh challenges, as do multi-die designs with their vertical architectures.

Amidst a serious talent shortage, analog design teams must figure out how to run design rule checks and simulation, how to address parasitic effects and electromigration/IR drop (EMIR), and much more. And while the digital side of the house tends to get a lot of focus, today’s designs continue to contain plenty of analog components, from high-bandwidth memory to high-speed I/Os.

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