ST to pull out of IBM Alliance for process technology
January 29, 2015
STMicroelectronics is pulling out of the IBM Alliance for semiconductor process technology and is now, apparently, without a source of core CMOS technology.
“Our agreement with IBM provides us the right to end the participation in this Alliance under certain conditions,” says Jean-Marc Chery, COO of ST, “and we made the decision during the quarter to exercise those rights. Today, we are in discussion with IBM to plan for a smooth wind-down of our participation in this Alliance.”
To read the full article, click here
Related Semiconductor IP
- TSMC 7nm 0V75 / 0V9 ESD Local Clamp – Low Cap
- TSMC 65nm 3V3 ESD Local Clamp – Rad Hard
- TSMC 5nm 1V8, 1.2V and 0.9V ESD Local Protection – Low Cap
- TSMC 3nm 3V3 ESD Local Clamp
- TSMC 3nm 1V2 ESD Local Clamp – Low Capacitance
Related Blogs
- The Future of Storage: From eMMC to the Blazing Speeds of UFS 5.0
- Intel and Cadence Partner to Build Out the Foundry Ecosystem in America
- Announcing the launch of CHERI Alliance: A unified front against digital threats
- Say Goodbye to Limits and Hello to Freedom of Scalability in the MIPS P8700
Latest Blogs
- Beyond Trusted: What the NSA’s New Guidance Means for Hardware Security
- A scalable, shader-programmable vector graphics GPU core for low-power MCUs
- Navigating ISO 26262 Part 11: A Guide for Semiconductor Architects
- Embedded Security explained: Digital signatures
- Hardware security verification must go beyond functional testing