The politics of productivity
March 30, 2011
Politics and productivity seem to go hand-in-hand in semiconductor R&D organizations. Perhaps it's natural. No manager or project team wants the low productivity Scarlet Letter. So it's hardly surprising that ostensibly poor performers use politics to avoid scrutiny.
But are these so-called low productivity projects really poor performers? In fact, many are not. Quite the opposite in fact—they often have high productivity (although insufficient throughput) but are mistakenly pigeonholed because their crime was a missed schedule. Moreover, schedule overrun usually is not due to low productivity.
To read the full article, click here
Related Semiconductor IP
- Adaptive Voltage Scaling (AVS) Bus Target IP
- Adaptive Voltage Scaling (AVS) Bus Host Controller
- NoC Interconnect IP Generator
- Over-Voltage Lockout (OVLO) IP
- Verification IP for Universal Chiplet Interconnect Express (UCIe) up to 3.0
Related Blogs
- In search of best-in-class R&D organizations
- Semiconductor Growth from AI-Driven Design Productivity
- Falling IC development productivity means lost engineering jobs
- Throughput, not productivity, is what matters
Latest Blogs
- Building the engine behind Arm’s silicon shift
- M31 High-Speed and Long-Channel MIPI C/D-PHY Solution on TSMC N3P/N3C
- Understanding security certification and how analog IP can help
- Embedded Security explained: Secure boot for embedded systems
- World's First Standards-Compliant 112G PHY IP for Linear Optics: A Turning Point for AI Interconnects