Moore's Law: Wanted, Dead or Alive
Moore’s Law is not dead but the vital signs have clearly changed. That was the key message I heard from Dr. Subramanian Iyer, Fellow and Chief Technologist at the IBM Systems & Technology Group, during the GSA Silicon Summit held on April 26 at the Computer History Museum in Mountain View, California. Iyer pointed out that process complexity has grown from node to node. Yes we already knew that—but in earlier node transitions the increased processing cost was offset by the doubled number of additional transistors per unit area you get for each jump. Iyer projected a graph showing that the reduced effective cost per transistor stops falling after the 32/28nm node. Here’s the graph:
To read the full article, click here
Related Semiconductor IP
- Zigbee Transceiver PHY
- Data Flow Architecture IP
- AMBA SPI Controller MRAM Controller
- Ethernet MAC
- Protocol Bridges
Related Blogs
- Moore’s Law and 40nm Yield
- Moore's Law and 28nm Yield
- Moore's (Empirical Observation) Law!
- Intel says Moore's Law alive and well and living at 32nm
Latest Blogs
- IDS-NoC: A Scalable Interconnect Solution for Modern SoC Design
- Leading-edge AI IC designs demand comprehensive HAV methodologies
- Beyond the Fab: Building Europe’s Next Generation of Semiconductor Champions
- AI Semiconductor Design at 3nm and 2nm: Silicon-Proven IP
- Samsung Foundry and Cadence Expand Infrastructure and Physical AI Solution