Real Number Model Development and Application in Mixed-Signal SoC Verification
April 9, 2012
With the escalating complexity of analog mixed-signal (AMS) chips, increasing digital content in response to new functionality demands, and steady growth of IP blocks into larger and larger SoCs, traditional AMS verification flows are becoming inefficient in handling full chip verification. High performance digital verification and high accuracy analog verification represented the foundation for traditional AMS verification, characterized by performance and accuracy tradeoffs -- thus making AMS verification the biggest challenge facing verification engineers today.
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