Verification Panel: It's More Than the Hardware
In the first part of this panel discussion on verifcation, the experts talked about the state of verification technology and the progress that has been made. It concluded by bringing up the subject of software verification. Taking part in this discussion are: Gary Smith, chief analyst with Gary Smith EDA; Paul Martin, senior manager for debug, trace and performance modeling at ARM; Rajeev Ranjan, CTO with Jasper Design Automation; Harry Foster, chief verification scientist at Mentor Graphics; and Varesh Paruthi, senior technical staff member at IBM.
To read the full article, click here
Related Semiconductor IP
- MIL-STD-1553 Controller IP
- UFS 5.x Device IP
- UCIe 3.x Controller IP
- Ethernet 800G PCS IP
- CHI to UCIe Bridge IP
Related Blogs
- Execute Your Hardware Verification Campaign in the Cloud - a Verification Engineer's Perspective
- Programmable Hardware Delivers 10,000X Improvement in Verification Speed over Software for Forward Error Correction
- Importance Of Hardware Security Verification In Pre-Silicon Design
- IDS-Verify™: From Specification to Sign-Off – Automated CSR, Hardware Software Interface and CPU-Peripheral Interface Verification
Latest Blogs
- CDM Dependence on Device Capacitance
- What the Cyber Resilience Act means for the future of chip design
- When Your IP Vendor Has Operated 150,000 Base Stations: Introducing Viettel Semiconductor
- Relationship between architecture and validation in system design
- The Post-Quantum Cryptography Mandate: Building Cryptographically Agile Systems for the Quantum Era