Finfet's Struggles Boost Simpler, Cheaper FD-SOI
FD-SOI, seeking to grow its ecosystem, will get a boost from the remarks of KLA Tencor CEO, Rick Wallace, about the struggles his customers are having with finfets.
“In logic and foundry, with the introduction of the new 3-D gate architectures, the yield issues our customers are grappling with today are proving to be the most challenging that the industry have ever faced, and even the smallest variation and process margin can cause significant yield losses for these devices,’ says Wallace.
FD-SOI uses few masks and has less processing steps than finfet.
To read the full article, click here
Related Semiconductor IP
- Band-Gap Voltage Reference with dual 2µA Current Source - X-FAB XT018
- 250nA-88μA Current Reference - X-FAB XT018-0.18μm BCD-on-SOI CMOS
- UCIe D2D Adapter & PHY Integrated IP
- Low Dropout (LDO) Regulator
- 16-Bit xSPI PSRAM PHY
Related Blogs
- FinFET vs FDSOI - Which is the Right One for Your Design?
- FD-SOI vs FinFET: Dan Hutcheson Re-Runs His Survey
- Altera vs Xilinx FinFET Update
- TSMC vs Intel vs Samsung FinFETs
Latest Blogs
- AI in Design Verification: Where It Works and Where It Doesn’t
- PCIe 7.0 fundamentals: Baseline ordering rules
- Ensuring reliability in Advanced IC design
- A Closer Look at proteanTecs Health and Performance Management Solutions Portfolio
- Enabling Memory Choice for Modern AI Systems: Tenstorrent and Rambus Deliver Flexible, Power-Efficient Solutions