DAC 2015 Verification Panel: ARM, AMD, Cavium, Freescale
During DAC 2015, Synopsys hosted a luncheon event at DAC in San Francisco, CA.
At this event, Michael Sanie, senior director of verification marketing at Synopsys highlighted the Synopsys Verification Continuum and several key next-generation technologies that are already in production and addressing the need to “Shift-Left” for faster time-to-market. These technologies include Verification Compiler, broad Verification IP portfolio, the industry’s fastest emulation system ZeBu Server-3, and Verdi, the industry’s de facto SoC debug environment.
Later, a panel of SoC industry experts from Altera, AMD, ARM, Cavium and Freescale shared viewpoints on managing the growing verification complexity and how their leading SoC design teams have achieved success by collaborating with Synopsys.
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