Bringing MEMS and asynchronous logic into an SoC design flow
Two companies at the Embedded Systems Conference this week have similar objectives, but for very different technologies. Coventor, a vendor of CAD and analysis tools for creating MEMS devices, described a plan for bringing MEMS design into the standard CMOS SoC flow. And asynchronous logic design shop Tiempo showed a flow that facilitates development of large asynchronous blocks within a conventionally synchronous SoC.
To read the full article, click here
Related Semiconductor IP
- Mesochronous Bridge for PCIe/CXL
- AI-native GPU
- OpenGMSL Verification IP
- OpenGMSL Leaf IP
- FlexGen Multi-Die Smart Network-on-Chip (NoC) IP
Related Blogs
- Inventors & IP Management: Bill Meade Interview
- Lead Times Up, Inventories Low, Double-Ordering Rife, Capacity Strained
Latest Blogs
- Automated, Faster Specification to Sign-Off with IDS-AI
- NovaTech Automation Crius PIU: Bringing Conventional Instrument Transformers onto the IEC 61850 Process Bus
- Single Pair Ethernet and TSN: The In-Robot Network Behind the Next Humanoid Robots
- A design path to success exists for ultra-low-voltage SoCs
- Where Routine Flow Ends Veriest Formal Expertise Begins