Bringing MEMS and asynchronous logic into an SoC design flow
May 3, 2010
Two companies at the Embedded Systems Conference this week have similar objectives, but for very different technologies. Coventor, a vendor of CAD and analysis tools for creating MEMS devices, described a plan for bringing MEMS design into the standard CMOS SoC flow. And asynchronous logic design shop Tiempo showed a flow that facilitates development of large asynchronous blocks within a conventionally synchronous SoC.
To read the full article, click here
Related Semiconductor IP
- Zigbee Transceiver PHY
- Data Flow Architecture IP
- AMBA SPI Controller MRAM Controller
- Ethernet MAC
- Protocol Bridges
Related Blogs
- Inventors & IP Management: Bill Meade Interview
- Lead Times Up, Inventories Low, Double-Ordering Rife, Capacity Strained
Latest Blogs
- IDS-NoC: A Scalable Interconnect Solution for Modern SoC Design
- Leading-edge AI IC designs demand comprehensive HAV methodologies
- Beyond the Fab: Building Europe’s Next Generation of Semiconductor Champions
- AI Semiconductor Design at 3nm and 2nm: Silicon-Proven IP
- Samsung Foundry and Cadence Expand Infrastructure and Physical AI Solution