CEVA's Computer Vision Advances to the Next Generation
March 26, 2015
With the MM3101, launched at the January 2012 Consumer Electronics Show, silicon IP supplier CEVA for the first time provided a processor core with instructions and other features specifically tailored for computer vision algorithms. (The precursor MM2000 and MM3000 were focused predominantly on encoding and decoding images and video). Later, the company released a super-resolution algorithm for computational photography, along with a software framework that enables Android applications to efficiently tap the MM3101 to accelerate multimedia functions.
To read the full article, click here
Related Semiconductor IP
- HDR Image Signal Processor
- High-performance 64-bit RISC-V architecture multi-core processor with AI vector acceleration engine
- High-performance 32-bit Superscalar Processor
- High-performance 32-bit multi-core processor with AI acceleration engine
- 64-bit CPU with RISC-V Vector Extension
Related Blogs
- Synopsys Fields Processor Core for Neural Network Computer Vision Applications
- CEVA Software Framework Brings Deep Learning to Embedded Vision Systems
- CES show report: Automobiles, computer vision, and imaging are big trends
- From ChatGPT to Computer Vision Processing: How Deep-Learning Transformers Are Shaping Our World
Latest Blogs
- IDS-NoC: A Scalable Interconnect Solution for Modern SoC Design
- Leading-edge AI IC designs demand comprehensive HAV methodologies
- Beyond the Fab: Building Europe’s Next Generation of Semiconductor Champions
- AI Semiconductor Design at 3nm and 2nm: Silicon-Proven IP
- Samsung Foundry and Cadence Expand Infrastructure and Physical AI Solution