3D Transistors @ TSMC 20nm!
November 7, 2011
Ever since the TSMC OIP Forum where Dr. Shang-Yi Chiang openly asked customers, “When do you want 3D Transistors (FinFETS)?” I have heard quite a few debates on the topic inside the top fabless semiconductor companies. The bottom line, in my expert opinion, is that TSMC will add FinFETS to the N20 (20nm) process node in parallel with planar transistors and here are the reasons why.
To read the full article, click here
Related Semiconductor IP
- USB-C Power Delivery IP Core
- Configurable Multi-Channel DMA Controller
- Samsung Foundry 4nm 1V8 GPIO I3C
- Root-of-Trust IP - High-Assurance Security for Advanced and Regulated Applications
- Root-of-Trust IP - Enhanced-Assurance, Configurable Security for Scalable Semiconductor Designs
Related Blogs
- TSMC To Tape-Out 20nm Apple Processor This Month
- Can Intel Beat TSMC?
- Inside TSMC’s Evolving Design Ecosystem: Shaping the Future of AI, with AI
- Synopsys Earns Five TSMC Open Innovation Platform Partner of the Year Awards for Advancing AI-Driven Semiconductor Innovation
Latest Blogs
- The $725 Million Chip Development: Why Execution Risk, Not IP Cost, Now Dictates Advanced-Node Survival
- From photon to actuation: How physical AI is redefining embedded compute
- Secure Boot for embedded Linux on Efinix Ti375C529: Getting started with KiviBoot-Linux
- Akida in High-Frequency Trading: The Smart Signal Layer
- Cadence Expands Sovereign AI in Europe: From Chips to AI Factories