TSMC Expands IP Alliance to Include Soft IP

New initiative responds to design-driven customer demands

HSINCHU, Taiwan, R.O.C., Oct. 5, 2010 -- TSMC today expanded its IP Alliance to incorporate a soft IP program that will improve soft IP readiness for advanced technology nodes and drive earlier time-to-market.

TSMC is expected to provide specific design documents and technology information  through the program so that partners can optimize their soft IP to TSMC's technology. TSMC will also collaborate with these companies to expedite soft IP readiness by aligning their development with TSMC's process technology roadmap.

Soft IP has historically been process technology independent and therefore was not optimized for power, performance and area considerations. Given the ever-increasing need of first time silicon success and early time-to-market for highly integrated circuits such as System-on-Chip (SoC), close technical collaboration between the foundry and the IP provider is imperative to optimize this critical trade-off.

The new program enriches TSMC's IP alliance portfolio, encourages soft IP innovation and reuse through TSMC's Open Innovation Platform™ initiative, and helps deliver power, performance and area optimization that are a particularly important consideration to the success of products at advanced technology nodes.

"Understanding power, performance and area trade-off inherent in large SoC designs early in the design cycle is essential," said Dan Kochpatcharin, deputy director, IP Portfolio Marketing at TSMC. "We work with soft IP partners to combine TSMC's foundry-leading technologies and manufacturing capability with their soft IP cores to address this concern."

TSMC kicked off the soft IP program by working with EDA and IP companies Arteris, Atrenta Inc., Cadence Design Systems, Inc., Chips&Media, Imagination Technologies, Intrinsic-ID, MIPS Technologies, Sonics, Inc., Synopsys, Inc. and Vivante Corporation.

About the Open Innovation Platform™

The TSMC Open Innovation Platform ™ promotes timeliness-driven innovation among the semiconductor design community, ecosystem partners, and TSMC's complete technology portfolio. The Open Innovation Platform includes a set of ecosystem interfaces and collaborative components initiated and supported by TSMC that efficiently empowers innovation throughout the supply chain thereby enabling creation and sharing of newly created revenue and profitability. TSMC's Active Accuracy Assurance (AAA) initiative is a critical part of the Open Innovation Platform, providing the accuracy and quality required by ecosystem interfaces and collaborative components.

About TSMC  

TSMC is the world's largest dedicated semiconductor foundry, providing the industry's leading process technology and the foundry's largest portfolio of process-proven libraries, IPs, design tools and reference flows. The company's managed capacity in 2009 totaled 9.96 million (8-inch equivalent) wafers, including capacity from two advanced 12-inch GigaFabs™, four eight-inch fabs, one six-inch fab, as well as TSMC's wholly owned subsidiaries, WaferTech and TSMC China, and its joint venture fab, SSMC. TSMC is the first foundry to provide 40nm production capabilities. Its corporate headquarters are in Hsinchu, Taiwan. For more information about TSMC please visit http://www.tsmc.com.