sureCore Delivers 40nmULP Memory Compiler
2016-06-03 12:36:00
IP Cores & Design
Semiconductor IP News Archive - Page 629 of 1946
Newracom Successfully Communicates with Wi-Fi HaLow, IEEE 802.11ah at a Distance Greater than 1 km
2016-06-03 04:22:00
Misc
ARM Expands Cycle Model Portfolio with Support for SystemC
2016-06-02 17:19:00
EDA & Design Tools
Synopsys' SpyGlass Solution Delivers Critical Technology to Enable Compliance with DO-254 Aviation Safety Standard
2016-06-02 15:07:00
EDA & Design Tools
Comcores Announce Availability of a 10G TSN Ethernet MAC solution
2016-06-02 14:40:00
IP Cores & Design
Hitachi Adopts Cadence AMS Model-Based Methodology and Tools for Mixed-Signal Design Verification
2016-06-02 06:09:00
EDA & Design Tools
Spontey Rebrands as RealSilicon
2016-06-02 05:59:00
Misc
Blue Pearl Software Visual Verification Suite 2016.2 Simplifies ASIC, FPGA and IP RTL Verification
2016-06-02 02:54:00
EDA & Design Tools
Synopsys' Next-Generation Embedded Vision Processors Boost Performance up to 100X
2016-06-01 15:09:00
IP Cores & Design
Long-term Strategy Pays Off As TI Maintains Analog Leadership
2016-06-01 14:28:00
Analysis & Insight
Allegro DVT to Highlight Latest Multi-Format Video Codec Hardware IPs at Upcoming DAC 2016.
2016-06-01 13:23:00
Misc
Innovium secures more than $50M in funding
2016-06-01 11:27:00
Strategic Partnerships
NetSpeed and Magillem partner to enable seamless IP integration of cache coherent NoC IP
2016-06-01 11:02:00
EDA & Design Tools
True Circuits Attends Design Automation Conference Showcases State-of-the-art Ultra PLL, Low Power IoT PLL and Revolutionary DDR 4/3 PHY
2016-06-01 10:49:00
Misc
ARM's Bifrost Steps Up Graphics, Bridges to Machine Learning
2016-06-01 09:52:00
Analysis & Insight
Boost Valley Announces V-by-One HS Verification IP
2016-06-01 09:21:00
Verification IP
sureCore 40nm Ultra-Low Voltage SRAM Proves World Beating Low Voltage Operation in Silicon
2016-06-01 07:43:00
IP Cores & Design
Avnet ASIC Israel Ltd. (AAI) Standardizes on Synopsys' Design Compiler Graphical to Accelerate SoC Design Cycle
2016-06-01 07:33:00
EDA & Design Tools
Cadence Next-Generation Virtuoso Platform Deployed by STMicroelectronics for SmartPower Technologies
2016-06-01 05:23:00
EDA & Design Tools
Andes Technology Corporation Announces Most Advanced Embedded Security Based on Physical Unclonable Functions From Intrinsic-ID Inc. for Its Secure CPU/MCU Cores
2016-06-01 02:18:00
IP Cores & Design