Dual Serial ATA 1.5/3.0/6.0 Gbps Phy
TRC6002CSA is a Dual Serial ATA (SATA) Host PHY core for interfacing serial data between Storage Device and external 2-port PHY.
Serial ATA I/II/III Host Controller IP Core Compliance Certified by UNH Labs
The Serial ATA Host Controller IP Core provides an interface to highspeed serial link replacements for the parallel ATA attachmen…
Serial ATA I/II Device Controller IP Core
The Serial ATA Device Controller IP Core provides an interface to high-speed serial link replacements for the parallel ATA attach…
Serial ATA (SATA) PHY Transceiver IP
SMS6000 is a fully integrated CMOS transceiver that handles the low level Serial ATA protocol and signaling.
Dual Parallel to Serial ATA 1.5/3.0Gb/s PHY Core
TRC3002CSA is a Dual Serial ATA (SATA) PHY core for interfacing serial data between Storage Device and external 2-port PHY.
Serial ATA Dual Host Controller
The LDS_SATA HOST DUAL XV5 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 5 FPGA.
The SAS Initiator IP core is fully compliant with Serial ATA SCSI 5.0 Specification.
The Serial ATA Host IP Core provides an interface to high-speed serial link replacements for the parallel ATA attachment of mass …
SATA-IP core - File system management without CPU
SATA IP core compliant with the Serial ATA specification revision 3.0 and work on AMD UltraScale and 7-Series device.
SATA HOST CONTROLLER core is compliant with SATA version 3.5 specification.
This SATA 3 Controller IP enables fast and efficient connectivity for storage devices, supporting high-speed data transfer.
The so_ip_sata3_hctrl is a soft core implementation of SATA host controller as defined in the SATA Specification 3.2.
IP
The so_ip_sata2_hctrl is a soft core implementation of SATA host controller as defined in the SATA specification 2.6.
The TRC16024CPA is a four lane Gen 1,2,3,4 PCI Express Physical layer (Phy) Phy IP core, delivering high-speed serial data transm…
The TRC5024CPA is a four lane Gen 1 and 2 PCI Express Physical layer (Phy) Phy IP core, delivering high-speed serial data transmi…
The TRC5024CPA is a four lane Gen 1 and 2 PCI Express Physical layer (Phy) Phy IP core, delivering high-speed serial data transmi…
USB 3.2/ PCIe 3.1/ SATA 3.2 Combo PHY IP, Silicon Proven in UMC 28HPC
The combo PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 3.1 Base Specification with support…
SATA 6G PHY in GF (40nm, 28nm)
The Synopsys IP solution for Serial ATA (SATA) provides the necessary logic to implement and verify designs using the SATA interf…
USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 14SF+
The combination PHY is SATA (Serial ATA) compliant with SATA 3.0 Specification, PCIe (Peripheral Component Interconnect Express) …