Serial Peripheral Interface – Master/Slave with Octal, Quad, Dual and Single SPI Bus support
The SPI IP is a revolutionary octal SPI designed to offer the fastest operations available for any serial SPI memory.
The DB-eSPI-SPI-MS-AMBA is a Serial Peripheral Interface (SPI) Controller Verilog IP Core supporting the addition of Enhanced SPI…
The AHB-Lite to SPI Bridge is used to translate 32-bit AHB-Lite Writes and Reads to Writes and Reads over a SPI interface.
Master and Slave SPI Bus Controller
The Serial Peripheral Interface (SPI) allows high-speed synchronous serial data transfer between microprocessors / microcontrolle…
SPI Controller IP- Master/Slave, Parameterized FIFO, AMBA APB / AHB / AXI Bus
The DB-SPI-MS-AMBA is a Serial Peripheral Interface (SPI) Controller Verilog IP Core supporting both Master/Slave SPI Bus transfe…
I2C and SPI Master/Slave Controller
The I2CSPI-CTRL is a compact and versatile serial interface controller supporting both SPI (Serial Peripheral Interface) and I2C …
SPI Controller IP- Master/ Slave, Parameterized FIFO, Avalon Bus
The Digital Blocks DB-SPI-MS-AVLN is a Serial Peripheral Interface (SPI) Controller Verilog IP Core supporting both Master/Slave …
SPI Slave IP transfers to/from a AMBA APB, AXI, or AHB Interconnect
The DB-SPI-S-AMBA-BRIDGE is a Serial Peripheral Interface (SPI) Controller Verilog IP Core supporting only Slave SPI Bus transfer…
DO-254 AXI Serial Peripheral Interface (SPI) 1.00a
Provides a serial interface to SPI devices such as SPI EEPROMs and SPI serial flash devices.
AXI Performance Subsystem - ARM Cortex A
The AXI Performance Subsystem is an AMBA® AXI4 based system that is useful as the digital infrastructure for building SOCs needin…
AHB Secure Subsystem - ARM Cortex M3
The Secure AHB Performance Subsystem is a high-performance AHB subsystem that allows for a high level of hardware and software se…
XPS Serial Peripheral Interface
The XPS Serial Peripheral Interface (SPI) connects to the PLB (Processor Local Bus) and provides a serial interface to SPI device…
APB SPI (Serial Peripheral Interface) master and slave
The eSi-SPI core is a Serial Peripheral Interface that can be used to implement full-duplex, synchronous, serial communications b…
The SmartDV's LVDS verifies the Radio Front end-Baseband digital parallel interface.LVDS Verification IP can be used to verify BB…
The SafeSPI-CTRL implements a versatile and reliable Serial Peripheral Interface (SPI) controller compliant with the SafeSPI spec…
Intelligent Sensor and Power Management Design Platform
The IQonIC Works ISP is an integrated ASIC design platform for low power analog/mixed signal ASICs for IoT, Smart Home, Healthcar…
The SPI2AHB core implements an SPI slave to AHB-Lite master bridge.
The SPI to AHB bridge is an SPI slave that provides a link between a SPI bus (that consists of two data signals, one clock signal…
Flash SPI controller master/slave
Veriest's SPI Master Controller IP provides an industry standard data communication channel between the AMBA APB and SPI buses.
Multi Protocol Synchronous Serial Engine IP
The developed IP integrates basic serial interface protocols like UART, SPI and I2C into a single AXI interface port.