This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.1/v1.2”, which consists of Bi-directional 1-Clock and 4-Data …
- GlobalFoundries
- 110nm
- Silicon Proven
This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.1/v1.2”, which consists of Bi-directional 1-Clock and 4-Data …
Physical interface for CSI-2 and DSI providing 2.5Gbps per lane of bandwidth Arasan’s MIPI D-PHY Analog Transceiver IP Core is fu…
MIPI D-PHY
The T40LP_MIPIDPHYV01 IP is a MIPI D-PHY and LVDS based on TSMC 40nm LP process.
D-PHY physical layer The IP for MIPI® D-PHYsm integrates a high-speed transmitter/receiver, low-power transmitter/receiver, and l…
MIPI DPHY Verification IP is compliant with MIPI DPHY specification and verifies DPHY devices.
1.5G MIPI D-PHY in SMIC 130nm~28nm
The ACTT family of interface IP for MIPI protocols is the way with mobile-optimized low power and high performance.
The MIPI D-PHY Verification IP provides an effective & efficient way to verify the components interfacing with MIPI D-PHY interfa…
MIPI D-PHY Tx IP, Silicon Proven in TSMC 22ULP
The MIPI D-PHY Analog TX IP Core adheres fully to version 1.2 of the D-PHY specification.
MIPI DSI Transmitter v1.2 Controller IP, Compatible with MIPI D-PHY & C-PHY
MIPI DSI transmitter IP is used to connect to up to two displays using the MIPI DSI-1 protocol.
MIPI D-PHY and FPD-Link (LVDS) Combinational Transmitter for TSMC 22nm ULP
The Renesas MIPI D-PHY and FPD-Link (LVDS) combinational Transmitter is useful 4 Data Channel driver hard macro for DSI of TSMC 2…
The MIPI® D-PHY is compliant to the MIPI D-PHY Specification v2.1.
MIPI D-PHY Analog Transceiver IP Core
To address the explosive growth in the mobile industry, the Mobile Industry Processor Interface (MIPI®) Alliance was created to d…
Mobile Industry Processor Interface (MIPI) D-PHY is supported on Agilex™ 5 and Agilex™ 3 FPGAs allowing transmission and receptio…
MIPI D-PHY1.2 CSI/DSI TX and RX
The MIPI D-PHY + DSI/CSI Controller IP is a versatile solution designed for high-speed data transmission in mobile and multimedia…
Simulation VIP for MIPI D-PHY, C-PHY and A-PHY
Cadence provides a mature and comprehensive Verification IP (VIP) for the D-PHY/C-PHY/A-PHY, which is part of the MIPI family.
MIPI D-PHY TX PHY and DSI controller
The MIPI D-PHY Transmitter PHY and DSI Controller are tailored for high-performance display applications.
MIPI D-PHY TX & RX + DSI & CSI Controllers
Our MIPI D-PHY Transmitter and receiver PHY with Display Serial Interface (DSI) and Camera Serial Interface (CSI) Controllers are…
MIPI D-PHY v1.2 TX 4 Lanes in Samsung (8nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and per…
MIPI D-PHY v1.2 RX 2 Lanes in Samsung (8nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and per…