Compact High-Speed 32-bit CPU Core
AndesCore™ N25F is a 32-bit CPU IP core based on AndeStar™ V5 architecture which incorporated RISC-V technology, it is capable of…
- CPU
Compact High-Speed 32-bit CPU Core
AndesCore™ N25F is a 32-bit CPU IP core based on AndeStar™ V5 architecture which incorporated RISC-V technology, it is capable of…
Compact High-Speed 32-bit CPU for Real-time and Linux Applications
AndesCore™ A25 is a 32-bit CPU IP core based on AndeStar™ V5 architecture which incorporated RISC-V technology, it is capable of …
Compact High-Speed 64-bit CPU for Real-time and Linux Applications
AndesCore™ AX25 is a compact 64-bit CPU IP core based on AndeStar™ V5 architecture which incorporated RISC-V technology, it is ta…
RISC-V Processor - RV12 - 32/64 bit, Single Core CPU
The RV12 is a configurable single-issue, single-core RV32I, RV64I compliant RISC CPU intended for the embedded market.
32-bit CPU IP core - ISO 26262 Automotive Functional Safety Compliant
AndesCore™ D25F-SE is a 32-bit CPU IP core that supports ISO 26262 ASIL B level functional safety for automotive applications.
A CPU Foundation for the Automotive Industry The Arm Neoverse V3AE CPU is built to deliver maximum performance for automotive app…
A CPU Foundation for the AI-Driven Datacenter The Arm Neoverse V3 CPU is built to deliver maximum performance for cloud applicati…
RISC-V CPU IP With ISO 26262 Automotive Functional Safety Compliant
AndesCore™ N25F-SE is a 32-bit CPU IP core that supports ISO 26262 ASIL B level functional safety for automotive applications.
Infrastructure for Next-Generation Throughput Demands The Neoverse E1 processor is a new class of efficient CPU technology design…
Industry- Performance and Power Efficiency for Cloud-to-Edge Infrastructure Our first Armv9 infrastructure CPU, Neoverse N2 offer…
H8/300 CPU IP ( 8-bit CPU IP )
H8/300 is a high speed 8-bit CPU with an internal 16-bit architecture.
64-bit CPU Core with Level-2 Cache Controller
The 64-bit AX27L2 is a 5-stage processor that supports the latest RISC-V specification, including “G” (“IMAFD”) standard instruct…
Compact High-Speed 32-bit CPU Core with Level-2 Cache
The 32-bit A27L2 is a 5-stage processor that supports the latest RISC-V specification, including “G” (“IMAFD”) standard instructi…
64-bit CPU with RISC-V Vector Extension
The 64-bit NX27V is a vector processor with 5-stage scalar pipeline that supports the latest RISC-V specification, including the …
Compact High-Speed 32-bit CPU Core with MemBoost and PMA
The 32-bit A27 is a 5-stage processor that supports the latest RISC-V specification, including "G" ("IMAFD") standard instruction…
64-bit CPU with Modern RISC Architecture, MemBoost and PMA
The 64-bit AX27 is a 5-stage processor that supports the latest RISC-V specification, including “G“ (“IMAFD”) standard instructio…
Accelerating the Scalable Cloud-to-Edge Infrastructure Transformation The Neoverse N1 CPU is optimized for a wide range of cloud …
Compact High-Speed 32-bit CPU Core with DSP
AndesCore™ D25F is a 32-bit CPU IP core based on AndeStar™ V5 architecture which incorporated RISC-V technology, it is capable of…
Ultra Compact 32-bit RISC-V CPU Core
AndesCore™ N22 is a 32-bit 2-stage pipeline CPU IP core based on AndeStar™ V5 architecture for embedded applications that require…
Compact High-Speed 64-bit CPU Core
AndesCore™ NX25F is a compact 64-bit CPU IP core based on AndeStar™ V5 architecture which incorporated RISC-V technology, it is t…