M31 eMMC/SDIO at HLMC 28HKC+ Process
SD (Secureity Digital) and eMMC (embedded MultiMedia Card) I/Os are non-volatile memory interface technologiesy with high bandwid…
M31 eMMC/SDIO at TSMC 40LP Process
SD (Secureity Digital) and eMMC (embedded MultiMedia Card) I/Os are non-volatile memory interface technologies with high bandwidt…
M31 eMMC/SDIO at TSMC 28HPC+ Process
SD (Secureity Digital) and eMMC (embedded MultiMedia Card) I/Os are non-volatile memory interface technologiesy with high bandwid…
M31 eMMC/SDIO at TSMC 22ULP Process
SD (Secureity Digital) and eMMC (embedded MultiMedia Card) I/Os are non-volatile memory interface technologiesy with high bandwid…
M31 eMMC/SDIO at TSMC 22ULL Process
SD (Secureity Digital) and eMMC (embedded MultiMedia Card) I/Os are non-volatile memory interface technologiesy with high bandwid…
M31 ADC / Temp. Sensor IP in 6nm,7nm, 12/16nm, 22nm Process
The M31 SAR ADC provides a rich portfolio with a resolution from 10 to 12-bit, maximum speed up to 2.5MSPS, and supports input ty…
General Purpose I/O (GPIO) in TSMC(12nm,16nm,22nm, 28nm, 40nm, 90nm BCD+, 152nm BCD, 180nm BCD)
GPIO is a general-purpose input/output unit that provides basic input/output functionalities.
IP for Automotive Applications
M31 provides the variety IP types which meet ISO 26262 vehicle function safety requirements for the different applications in the…
M31 Digital PLL IP in 3nm, 5nm, 6nm, 7nm, 12nm, 16nm, 22nm,28nm,40nm
M31 Digital PLL is a core-power only programmable phase-locked loop (PLL) for frequency synthesis.
MIPI C-PHY v2.0 /D-PHY v2.5 Combo IP in TSMC
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.
PCIe 5.0 PHY IP for Storage and High-Bandwidth Connection
M31 PCIe 5.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications.
M31 LPDDR4X multi-PHY support DDR4, LPDDR4, and LPDDR4X up to 4267Mbps.
USB4 Gen3X2 and DP1.4 X4 PHY IP with Type-C connector support
M31 USB4 Gen3x2 transceiver IP provides a range of USB4 Gen3x2 host and peripheral applications up to 40Gbps.
Low Power Fractional PLL IP in TSMC(12/16nm FFC, 22nm ULP/ULL, 28nm HPC+)
M31 LPFPLL is a low-power programmable fractional-N (LPF), phase-locked loop (PLL) for frequency synthesis.
Display Port 2-Lane Transmitter PHY
M31 DisplayPort TX IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications.
Special I/O-eMMC/SDIO in TSMC(22nm, 28nm, and 40nm)
SD (Secureity Digital) and eMMC (embedded MultiMedia Card) I/Os are non-volatile memory interface technologiesy with high bandwid…
Standard Cell Library in TSMC (12nm~180nm)
M31 provides a variety of cell libraries, including Ultra-High Density Standard Cell Library (HDSC), General Purpose Standard Cel…
Memory Compiler in TSMC (16nm,22nm,28nm,40nm,55nm,90BCD+,110nm,152nm,180BCD)
M31 memory compilers are designed with high industrial standard which provides the memory solutions for density, power, and perfo…
PCIe 4.0 PHY in TSMC(6nm,7nm, 12nm,16nm)
M31 PCIe 4.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications.
SerDes PHY IP in TSMC (7nm, 12/16nm, 22nm, 28nm)
M31 Serdes PHY IP provides high-performance, multi-lane capability and low power architecture for the high-bandwidth applications.