Vendor: M31 Technology Corp. Category: SRAM

Memory Compiler in TSMC (16nm,22nm,28nm,40nm,55nm,90BCD+,110nm,152nm,180BCD)

M31 memory compilers are designed with high industrial standard which provides the memory solutions for density, power, and perfo…

TSMC 40nm BCD+ View all specifications

Overview

M31 memory compilers are designed with high industrial standard which provides the memory solutions for density, power, and performance optimization. M31 memory compilers are using industry leading techniques to help customers to achieve their various SOC projects.

Meanwhile, M31 Memory Compiler IP was certified with ASIL D of ISO 26262 on April, 2019.

Key features

  • Synchronous read/write operation
  • Low leakage current and lower operation power consumption
  • Minimum metal layer requirement: 4/3 metal layers
  • High density layout structure and small area design
  • Flexible geometry optimization for aspect ratio requirement
  • Provide power trunk with ring/ringless type instance macro
  • Provide built-in options for yield/performance optimization
  • Support BIST integration
  • Support repaired system solution

Silicon Options

Foundry Node Process Maturity
TSMC 40nm BCD+ —

Specifications

Identity

Part Number
M31 Memory Compiler
Vendor
M31 Technology Corp.
Type
Silicon IP

Videos

M31 N12e Low VDD Solution - Memory Compiler

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about SRAM IP core

M31 Expands Rambus Collaboration, Strengthening Its One-Stop MIPI Subsystem Solution

This collaboration combines these controller capabilities with M31’s silicon-proven MIPI PHY portfolio with a strong track record of successful deployments, enabling M31 to offer a comprehensive MIPI subsystem solution integrating high-speed MIPI PHYs and MIPI CSI/DSI controllers to address the growing requirements of high-resolution imaging and display applications.

M31 High-Speed and Long-Channel MIPI C/D-PHY Solution on TSMC N3P/N3C

With the rapid growth of AR/VR and high-resolution imaging systems such as drones and action cameras, MIPI CSI (Camera Serial Interface) and MIPI DSI (Display Serial Interface) require both high data throughput and low power consumption. M31 provides a MIPI C-PHY and D-PHY IP combo solution implemented on TSMC N3P and N3C processes.

M31 Gains Momentum in Advanced Processes, Targets Double-Digit Growth in 2026

Consolidated revenue for the first quarter reached NT$395 million, representing a year-over-year decrease of 9.2%. The decline was primarily attributable to timing fluctuations in contract signings for certain key advanced-node customers in North America, with the related revenue expected to be recognized in the second quarter.

Frequently asked questions about SRAM IP cores

What is Memory Compiler in TSMC (16nm,22nm,28nm,40nm,55nm,90BCD+,110nm,152nm,180BCD)?

Memory Compiler in TSMC (16nm,22nm,28nm,40nm,55nm,90BCD+,110nm,152nm,180BCD) is a SRAM IP core from M31 Technology Corp. listed on Semi IP Hub. It is listed with support for tsmc.

How should engineers evaluate this SRAM?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this SRAM IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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