Programmable Special IO in SMIC0.13um
AR750S13 is a programmable special IO cell supporting various JEDEG standards, such as LVDS, LVTTL, LVCMOS-33/25/18/15, SSTL_3/2/…
- SMIC
- 130nm
- G
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Programmable Special IO in SMIC0.13um
AR750S13 is a programmable special IO cell supporting various JEDEG standards, such as LVDS, LVTTL, LVCMOS-33/25/18/15, SSTL_3/2/…
16Bit 91dB Audio CODEC with headphone drivers and PWM Controller, SMIC0.18um
AR34S3E is a mass-production proven sigma-delta mono CODEC designed for portable device applications.
16~24Bit Stereo Audio CODEC, SMIC0.18um
The AR34S1 is a 90dB multi-bit sigma-delta audio CODEC designed for low power portable applications.
16-Bit 93dB Mono Sigma-Delta Audio CODEC with FM/MIC, TSMC0.18um
The AR34T3C Mono audio CODEC is a cost-down high-end solution for multi-media portable applications.
ESD diode and Clamps for 90nm TSMC G/GT/LP
Stand alone ESD diodes and Supply clamping for TSMC 90nm G/GT/LP processes
Expanded UART with FIFO, hard and soft flow control, synchronous mode
The D16950 is a soft core of a Universal Asynchronous Receiver/Transmitter (UART), functionally identical to the OX16C950.
16-Bit 90dB SNR 8~48KHz stereo ADC with FM/MIC inputs, TSMC0.18um
The AR32T3D is a mass-production proven, high performance, low cost, stereo audio A/D converter designed for portable audio recor…
1394b FPGA Link Layer Controller
The FireCore Basic is targeted for applications with up to S3200 data transmission requirements and for designs with a non-PCI Li…
Highest code density, Low Power 32-bit Processor with optional DSP
The Beyond BA22 32-bit processor offers the highest code density of any processor in its class, reducing die size and memory requ…
IntelliProp’s SATA host core (IPC-SA101A-HI) is an industry standard Serial-ATA (SATA) host interface core that enables host appl…
The Public Key Crypto Engine is a versatile IP core for hardware offloading of all asymmetric cryptographic operations.
XTS-AES IEEE P1619 Core Families
XTS2 and XTS3 (formerly known as XEX2 and XEX3) implement the NIST standard AES cipher in the XEX/XTS mode for encryption and dec…
AES Core GCM for 10Gbit/sec packet data
This state of the art implementation of AES-GCM achieves 10Gbit/sec performance under worst case traffic conditions on Virtex 5 F…
The NIST Validated (cert # 953) G3 AES core family is the third generation of Algotronix' AES technology.
The G2 AES encryption core represents the second generation of Algotronix' AES technology: it is a stable, NIST validated impleme…
10/100 Mb Media Access Controller
Our solution is a hardware implementation of media access control protocol defined by the IEEE standard.
Programmable Interrupt Controller
The D8259 is a soft Core of Programmable Interrupt Controller.
Programmable Peripheral Interface
The D8255 is a programmable I/O device, designed to be used with all Intel CPUs.
Implementation of the new WLAN security standard (802.16e) requires the NIST standard AES cipher in CTR and CBC modes (a.k.a.
Ultra-Compact Advanced Encryption Standard (AES, FIPS-197) Core
The AES core implements Rijndael cipher encoding and decoding in compliance with the NIST Encryption Standard.