CMOS Low Power Programmable Frequency Divider(50-2400 MHz)
IP
- Clock Generator
- NOW
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
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Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
CMOS Low Power Programmable Frequency Divider(50-2400 MHz)
IP
Poly Phase CMOS Programmable Frequency Divider (50-2400 MHz)
IP
915MHz - 930MHz RPA12C Single stage low power low current PA
IP
The S65LLV25_CODEC_04 integrates: 2-channel 24bit sigma-delta ADC, 2-channel 24bit sigma-delta DAC with headphone driver amplifie…
The S65LLV25_CODEC_04 integrates: 2-channel 24bit sigma-delta ADC, 2-channel 24bit sigma-delta DAC with headphone driver amplifie…
The S13V33_CODEC_04 integrates: 2-channel 24bit sigma-delta ADC, 2-channel 24bit sigma-delta DAC with headphone driver amplifier,…
The S13V33_CODEC_04 integrates: 2-channel 24bit sigma-delta ADC, 2-channel 24bit sigma-delta DAC with headphone driver amplifier,…
UFS 3.1 Silicon Proven 2.1 HOST
IP
UFS 3.1 Silicon Proven 2.1 Device, Host
IP
UniPro 2.0 & Silicon Proven v1.8, v1.61
IP
VeriSilicon CSMC 0.13μm 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Central Semiconductor Manufactur…
The USB1.1 PHY is an IP version of USB transceiver.
This IP is a programmable Analog PLL suitable for high speed clock generation.
VeriSilicon GSMC 0.18um (LP) 1.8V/3.3V Multiple I/O
VeriSilicon GSMC 0.18um (LP) 1.8V/3.3V Multiple I/O Cell (01E) Library developed by VeriSilicon is optimized for Grace Semiconduc…
The present IP is a VCC Detector (VDT) circuit.
The present IP is a VCC Detector (VDT) circuit.
GSMC 0.18um 3.3V Trimming Block
This IP is suitable for voltage trimming.
VeriSilicon GSMC 0.18um Synchronous Programmable Low Power Via1 ROM compiler optimized for Grace Semiconductor Manufacturing Corp…
VeriSilicon GSMC 0.18um General Process, Low Power circuit design, Diffusion ROM
VeriSilicon GSMC 0.18um Synchronous Low Power Diffusion ROM compiler optimized for Grace Semiconductor Manufacturing Corporation …
GSMC 0.18um 3.3v RC oscillator with internal R and C to generate 32±20%KHz clock.
The present IP is a RC oscillator with internal R and C to generate 32KHz±30% clock.