28nm HPM SP-SRAM with peri LVT
28nm HPM SP-SRAM with peri LVT
- UMC
- 28nm
- HPM
- Pre-Silicon
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
28nm HPM SP-SRAM with peri LVT
28nm HPM SP-SRAM with peri LVT
UMC 28nm HPM process standard synchronous high density single port SRAM memory compiler
UMC 28nm HPM process standard synchronous high density single port SRAM memory compiler
UMC 28nm HPC process standard synchronous high density single port low power SRAM memory compiler with row redundancy
UMC 28nm HPC Logic Process PG Single Port SRAM with LVT memory compiler
UMC 28nm HPC Logic Process PG Single Port SRAM with LVT memory compiler
UMC 28nm HPC Logic Process PG Single-Port SRAM with HVT memory compiler
UMC 28nm HPC Logic Process PG Single-Port SRAM with HVT memory compiler
UMC 28nm HPC Logic Process PG Single Port SRAM memory compiler
UMC 28nm HPC Logic Process PG Single Port SRAM memory compiler
UMC 28nm Logic process standard synchronous RVT periphery high density single port SRAM memory compiler with row redundancy.
UMC 28nm Logic process standard synchronous LVT periphery high density single port SRAM memory compiler.
UMC 28nm Logic process standard synchronous LVT periphery high density single port SRAM memory compiler.
UMC 28nm Logic process standard synchronous RVT periphery high density single port SRAM memory compiler.
UMC 90nm Standard Performance LowK Logic Process Synchronous high density single port register file SRAM memory compiler
UMC 40nm embedded high voltage (eHV) low power Process standard synchronous high density single port register file SRAM memory co…
UMC 40nm low power process standard synchronous one port register file SRAM memory compiler with LVT peripheral.
UMC 40nm low power process standard synchronous one port register file SRAM memory compiler with HVT peripheral.
UMC 40nm Low Power Process One Port Register File with 213 cell
UMC 40nm Low Power Process One Port Register File with 213 cell
UMC 40nm LP Logic Process one-port register file for area optimize with LVT peripheral
UMC 40nm LP Logic Process one-port register file for area optimize with LVT peripheral
UMC 40nm LP Logic Process one-port register file for area optimize with HVT peripheral
UMC 40nm LP Logic Process one-port register file for area optimize with HVT peripheral
UMC 40nm Low Power Process One Port Register File wit 213 cell
UMC 40nm Low Power Process One Port Register File wit 213 cell
UMC 28nm HPM ultra high speed register compiler
UMC 28nm HPM ultra high speed register compiler
UMC 28HPM UHS 1PRF