Single Port SRAM compiler - TSMC 180 nm BCD Gen2 - Memory optimized for high density and Low power - compiler range up to 320 k
- SRAM
- In_Production
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Single Port SRAM compiler - TSMC 180 nm BCD Gen2 - Memory optimized for high density and Low power - compiler range up to 320 k
MIPI C-PHY/D-PHY Combo v1.2 IP in TSMC(5nm, 7nm, 12/16nm, 28nm and 40nm)
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.
Narrow band - IoT Release-14 UE PHY. (L1) IP
This NB-IoT PHY.
Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 320 k
7 track Extra Low Consumption standard cell library with Dual Voltage capability
TSMC 180 RFID, SESAME eLC is specifically designed to enable Dual Voltage operation (1.8 V +/- 10% 1.1 V +/- 10%) and to operate …
IP
IP
Temperature Sensor - HHGrace 110nm ULL
IP
USB1.1 PHY - HHGrace 110nm ULL
IP
IP
IP
10G UDP/IP Hardware Protocol Stack
The core Implements a UDP/IP hardware protocol stack that enables wire-speed communication over a LAN or a point-to-point connect…
1G UDP/IP Hardware Protocol Stack
The core Implements a UDP/IP hardware protocol stack that enables wire-speed communication over a LAN or a point-to-point connect…
Configuration-over-Ethernet (COE) IP Core
Configuration-over-Ethernet (COE) is a Layer 2 configuration protocol design by SoC-e to access remotely to FPGAs that implements…
TSMC 180 BCD, SESAME eLC DV is specifically designed to enable robust dual voltage operation, with characterizations taking into …
Foundry sponsored - Single Port SRAM compiler - TSMC 90 nm LPeF - Memory optimized for high density and Low power - compiler rang…
Foundry sponsored - Single Port Register File compiler - TSMC 90 nm LPeF - Memory optimized for high density and high speed - com…
Single Port Register File compiler - TSMC 90 nm LPeF - Memory optimized for high density and high speed - Dual voltage - compiler…
10/100 Ethernet PHY, TSMC 28nm HPC+
-10 100ETHERNET-T28HPCP18 is a single-port DSP-based Fast Ethernet Transceiver.
Silterra 0.18um ULL Process 7track Power Management Kit
Silterra 0.18um Ultra Low Leakage 7track PMK Library