100G UDP/IP Hardware Protocol Stack
Implements a UDP/IP hardware protocol stack that enables high-speed communication over a LAN or a point-to-point connection.
- Ethernet
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
100G UDP/IP Hardware Protocol Stack
Implements a UDP/IP hardware protocol stack that enables high-speed communication over a LAN or a point-to-point connection.
High Speed Fractional PLL with SSC
The PLL IP is a high speed, wide range, fractional PLL with SSC feature
NFC (PICC, UHF, Controller) IP
T2M offers a wide range of IP including: NFC PICC Front-End IP (ISO/IEC 14443-A/B, ISO/IEC 15693, ISO/IEC 18092 Compliant): ISO/I…
50mA CMOS buck regulator - TSMC 0.18µ
The OT1150t180_50mA is a 50mA CMOS buck regulator designed for use in a wide variety of mixed signal device applications.
The I²C slave IP is fully synthesizable core and compatible with Phillips I²C standard.
The USB 2.0 On-The-Go (OTG) IP Core is a 32-bit Avalon interface compliant core and supports ULPI interface.
USB 2.0 Device, Software Enumeration FIFO Interface (USB20SF)
The USB 2.0 Device, Software Enumeration FIFO interface (USB20SF) IP Core is a FIFO based USB 2.0 device core with 32-bit Avalon/…
A new class of machine learning (ML) processor, called a microNPU, specifically designed to accelerate ML inference in area-const…
The new Arm Cortex-M55 processor brings endpoint artificial intelligence (AI) to billions.
7 track Extra Low Consumption standard cell library with Dual voltage capability (1.8 V / 1.1 V)
TSMC 180 G, SESAME HD DV optimized for high density and low power, with characterizations taking into account physical phenomena …
UDP 100G / 40G / 25G / 10G / 1G IP core
UDP100G/40G/25G/10G/1G IP core is the epochal solution implemented without CPU.
Synchronous Serial Interface (SSI) IP
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Dolphin Technology provides Real Time Clock (RTC) IP which is used to avoid confusion with ordinary hardware clocks which are onl…
Dolphin Technology provides Quad SPI Controller IP which enables access to a QSPI flash device through read, write and erase oper…
The Octa SPI Controller and PHY IP supports the fastest access frequency of 200MHz, with DDR Mode and Double Transfer Rate (DTR) …
DTI I3C Controller provides the logic consistent with NXP I3C specification to support the communication of low-speed integrated …
TSN Ethernet Switched Endpoint Controller
The TSN-SE implements a configurable controller meant to ease the implementation of switched endpoints for Time Sensitive Net-wor…
Image Signal Processing Pipeline IP core
ISPIDO is a well established collection of IP Cores, enabling high resolution image signal processing and calibration on heteroge…
Real-Time GPU IP for Path Tracing
RayCore MC is the World’s best real-time path tracing GPU IP.
The LEON5 sets a new standard with exceptional processing and fault tolerance capabilities, perfect for payloads and platform uni…