The vendor provides designers with configurable USB4 Controller and Router IP.
- USB
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
The vendor provides designers with configurable USB4 Controller and Router IP.
Ultra High Performance AES-XTS/ECB Core
The proliferation and expansion of connected devices, connectivity infrastructure, cloud computing, and artificial intelligence, …
Secure Boot Software Development Kit
Secure boot can greatly enhance the security of an embedded system by cryptographically verifying that the code being loaded and …
PCIe 6.0 PHY G2 , SS SF4X x4, North/South (vertical) poly orientation
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency ac…
USB-C 3.2 DP/TX PHY ebdaux in Samsung (SF4X, SF4E, SF2)
The Synopsys USB-C 3.2/DisplayPort 1.4 IP solution consists of USB-C 3.2/DisplayPort 1.4 PHYs, USB-C 3.2/DisplayPort 1.4 controll…
10G-100G MACsec Security Module
Data security between Ethernet connected devices is expanding due to multiple factors: exponential growth of data containing sens…
Data security between Ethernet connected devices is expanding due to multiple factors: exponential growth of data containing sens…
TSMC CLN3FFE GLink 2.3LL Die-to-Die PHY
IGPD2DZO1A is a high-speed Die-to-Die interface PHY that transmits data through TSMC packaging solutions, Integrated Fan-Out (InF…
UCIe-S PHY for Standard Package (x16) in SS SF5A, North/South Orientation
The UCIe PHY IP enables high-bandwidth, low-power, and low-latency die-to-die connectivity in a multi-die package for hyperscale …
Tensix Cores for specialized acceleration
Tensix NEO® is Tenstorrent’s latest high performance AI architecture, optimized for performance-per-mm2 and performance-per-watt.
<4Gbps Low Power D2D Interface in TSMC 16nm & 28nm
A
Custom die-to-die interface in 12/16nm process technology.
Video Processing Unit (VPU) IP
High Number of Streams Decoder For Data Center
Hantro VC9800E enables up to 256 streams encoding with high video quality single-core solution, or multi-core solution, supportin…
AI processing engine - Voice control, Context detection and Sensor applications
AON1020™ belongs to the optimized AONSens™ Neural Network cores for Voice and Audio recognition as well as other sensor applicati…
AI processing engine - Voice control, Context detection and Speaker ID
AON1010™ belongs to the optimized AONVoice™ Neural Network cores for Voice and Audio recognition.
112G LRM PHY, TSMC N5 x2, North/South (vertical) poly orientation
The Multi-Protocol 112G PHY IP is part of a high performance multi-rate transceiver portfolio for high-end networking and high pe…
32-bit RISC-V microcontroller.
64-bit RISC-V embedded core with in-order single issue pipeline
64-bit RISC-V embedded core with in-order single issue pipeline.
32-bit RISC-V embedded core with in-order single issue pipeline
32-bit RISC-V embedded core with in-order single issue pipeline.