Vendor: Synopsys, Inc. Category: Symmetric Crypto

Ultra High Performance AES-XTS/ECB Core

The proliferation and expansion of connected devices, connectivity infrastructure, cloud computing, and artificial intelligence, …

Overview

The proliferation and expansion of connected devices, connectivity infrastructure, cloud computing, and artificial intelligence, is driving for increased need for high-grade security that keeps up with the hyper-connected and hyper-speed technology requirements to protect the significant increase in volume of confidential information and critical data.

AES with Galois/Counter Mode (AES-GCM) is a symmetric cryptographic algorithm that provides scalable authenticated encryption and data integrity and is used in many applications and security protocols.

The Ultra High-Performance AES-GCM/CTR IP implements the AES-GCM/CTR algorithm as specified in the National Institute of Standards and Technology (NIST) Special Publication 800-38D, “Recommendation for Block Cipher Modes of Operation: Galois/Counter Mode (GCM) and GMAC” to achieve terabit performance required for supercomputing applications. It uses Advanced Encryption Standard (AES) algorithm in counter mode (CTR), and a high-performance MAC algorithm based on Galois Field multiplication with CTR mode encryption, which can be pipelined for high throughput operations.

The Ultra High-Performance AES-GCM/CTR Cryptographic Cores support for FIPS 140-3 certification and passed NIST CAVP validation.

Key features

  • High performance & low latency core with efficient support for varied network traffic
    • Non-stalling architecture
    • Full & interleaved packets
    • Single cycle packets
    • Unique keys/cycle
  • Standards compliant
    • AES-GCM/GMAC, AES-CTR
    • AES-CTR
  • NIST FIPS 140-3 security certification ready. Passed NIST CAVP validation.
  • Customer configurable
  • Scalable architecture
    • Throughput from 128 to 2048 bits/cycle (up to 2 Tbps @ 1GHz)
    • Min 7 cyc data latency
    • Up to 64K contexts
  • Encrypt/Decrypt/Bypass
  • 128/256-bit keys
  • Multi-clock domain
    • Host, Secure Key Port, Core
  • Optional support for OSCCA SM4-XTS

Specifications

Identity

Part Number
dwc_ultra_high_perf_aes_xts_ecb
Vendor
Synopsys, Inc.
Type
Silicon IP

Security

Crypto Algorithm
AES

Files

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about Symmetric Crypto IP core

Right-Sizing Your Cryptographic Processing Solution

In this white paper we investigate different cryptography implementation options and trade-offs, describe the measurable parameters, and analyze examples. We introduce and use the new EEMBC SecureMark™ benchmark for these measurements

Frequently asked questions about Symmetric Cryptography IP cores

What is Ultra High Performance AES-XTS/ECB Core?

Ultra High Performance AES-XTS/ECB Core is a Symmetric Crypto IP core from Synopsys, Inc. listed on Semi IP Hub.

How should engineers evaluate this Symmetric Crypto?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Symmetric Crypto IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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