Brite provides a Bluetooth Low Energy (BLE) analog PHY.
- Bluetooth
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Brite provides a Bluetooth Low Energy (BLE) analog PHY.
The UTC70 IP core is a drop in module in charge of processing multiple formatted input date/time to translate it into "Coordinate…
The Core can reach payload bitrates up to 2.5 Gbits/s ( equivalent baud rates > 600Mbaud).
High Speed DDR Interface Solution
Brite provides a DDR subsystem including not only controller, PHY and IO, but also corresponding tuning and configuration softwar…
The IPrium-DVB-S2-Modulator IP Core implements the DVB-S2 modulation standard ETSI 302 307.
The IPrium-DVB-S-Modulator IP Core implements the DVB-S modulation standard ETSI 300 421.
10G I.3 BCH Encoder/Decoder for ITU G.975.1
The IPrium-10G-I.3-BCH-Codec IP core implements "Concatenated BCH super FEC" with BCH(3860, 3824) and BCH(2040, 1930) forward err…
LDPC CCSDS (8160, 7136) Encoder and Decoder
The IPrium-CCSDS-LDPC-8160-7136-Encoder-Decoder IP Core implements Low Density Parity Check (LDPC) forward error correction algor…
The IPrium-RS-Codec IP Core implements Reed-Solomon forward error correction algorithm.
ASIC IP-core for high-throughput decoding of DVB-S2/S2X, and DVB-RCS/RCS2
Very high throughput (several Gbps) decoder that can be configured on-the-fly as: DVB-S2/S2X LDPC decoder or as Six independent D…
90 dB of SNR, 24-bit stereo audio CODEC with 450 mW mono speaker driver and headphone output
Its small silicon area but exhaustive and robust features make shCODlv-90.14 THE most suitable solution for your mixed-signal SoC…
TC1600 is ideally suited for applications requiring small to medium block sizes in order to reduce latency and offer a high physi…
TC7000-LTE is a convolutional turbo code (CTC) decoder optimized for FPGAs.
Our FPGA core is optimized and 80% SMALLER AND FASTER THAN THE COMPETITION WITH < 1ms LATENCY @ 1080p30!
CSI2 RX; Camera Serial Interface, MIPI Compliant
The CSI2 Receiver IP Interfaces between Camera module which has the transmitter and the application processor.
Up to 105 dB of SNR, 24-bit stereo CODEC with PDM to PWM transmodulator DAC and embedded regulator
sCODa-MT1-LR.05 is an audio CODEC which provides the insurance of the best sound quality after integration into a SoC for Set-Top…
Multi-gigabit Modem for E-band backhaul systems
The IPrium-Multi-gigabit Modem IP Core is a BPSK/QPSK modem with integrated Reed-Solomon Forward Error Correction (FEC) and is op…
HBM2/2E Memory Controller Core
The HBM2E memory controller IP is designed for use in applications requiring high memory throughput including performance-intensi…
TICO compression is visually lossless lightweight compression specifically designed for the industry.
TICO compression is visually lossless lightweight compression specifically designed for the industry.