Ultra-Low-Latency 10GE PHY+MAC
Having the lowest network latency is critical for Accelerated Finance.
- Single-Protocol PHY
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Ultra-Low-Latency 10GE PHY+MAC
Having the lowest network latency is critical for Accelerated Finance.
Ultra Low Latency 10G TCP Endpoint
The TCP Endpoint implements a full, reliable streaming network stack in FPGA logic.
TS-4x8 V-Band Array Antenna 4x8 Array Antenna, 57 – 67 GHz V-Connector 1.85 mm
The TS-4x8 V-Band Array Antenna is a 57 to 67 GHz planar antenna with a bore-sight gain of min.
10 Gb/s full HW stack UDP/IP Transmitter/Receiver
10 Gb/s full HW stack UDP/IP Transmitter/Receiver IP block for high performance data transfers from embedded Ethernet based syste…
DVB-S2X-LDPC Decoder
6 track High Density standard cell library at TSMC 180 nm
TSMC 180 G, SESAME HD provides the best trade-off between area and power achieved from an cell design enabling 6-track cells.
The RAR-eSR-qLR Retention Alternating Regulator combines two regulation sub-components: a high-efficiency switching regulator (eS…
RAR-eSR-qLR-ref-[1.62-3.63]-[0.55-2.5].04, as any Power Management Virtual Component designed by Dolphin Design, is readily retar…
The RAR-eSR-qLR Retention Alternating Regulator combines two regulation sub-components: a high-efficiency switching regulator (eS…
Linear Regulator, Low quiescent current
The qLR-Aubrey-ref-[1.62-3.63]-[1.2-3.3]-I0.3-Iq200.01 is an ultra-low-quiescent-current regulator used to generate SoC internal …
Linear regulator with ultra low quiescent current for retention applications
Linear regulator with ultra low quiescent current for retention applications
Linear regulator with ultra low quiescent current for retention applications
Linear regulator with ultra low quiescent current for retention applications
Combined Power On Reset and Brown Out Reset
Combined Power On Reset and Brown Out Reset
Dolphin Design provides a Power Management IPs platform, toward three objectives: To standardize and ease Power Regulation Networ…
Over-voltage Protection Module to handle direct connection of voltage regulators to a 5V battery using standard IO devices
Linear Regulator for digital island
Linear Regulator to supply digital islands in TSMC 40nm uLP-eFlash
Low-BoM, inductor-based buck switching regulator with high efficiency, full PWM mode
Dolphin Design provides a Power Management IPs platform towards three objectives To standardize and ease Power Regulation Network…
Switching regulator, inductor-based, PWM mode, high efficiency
The eSR-Tugela is an inductor-based buck switching regulator with high efficiency.
Switching regulator, inductor-based, PWM mode, high efficiency
The eSR-Tugela is an inductor-based buck switching regulator with high efficiency.
Audio CODEC with 100 dB Dynamic Range, 24-bit stereo PWM DAC, six-channel ADC
YANZI-A-hexCOD-MT1-LR-VD.02 is a high-performance audio CODEC with 6 analog-to-digital converters (ADC) ensuring the most precise…