Chiplet Die-to-Die Interconnect IP Solution
High Performance Chiplet Die-to-Die Interconnect Total Solution
- Custom
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Chiplet Die-to-Die Interconnect IP Solution
High Performance Chiplet Die-to-Die Interconnect Total Solution
AMBA Bus Host to eSPI Controller/Target
eSPI Controller/Target RTL SystemVerilog IP Core
AMBA Bus Host to eSPI Controller
The Digital Blocks DB-eSPI-Controller-AMBA is a fully compliant Intel Enhanced Serial Peripheral Interface (eSPI) Base Specificat…
eSPI Target RTL SystemVerilog IP Core
Enhanced Serial Peripheral Interface – Controller IP with single, dual, and quad eSPI Bus support for Intel CPU’s
12-bit Digital-to-Analog Converter
The agileDAC 12 has a nominal 12-bit resolution at sample rates up to 20 Msps and a synchronous digital data input interface, supports single-ended or differential output and inc
Complete, reliable and fast SpaceWire encoder-decoder which has been designed according to ECSS-E-ST-50-12C.
Synopsys Verification IP (VIP) for MIPI C-Phy provides a comprehensive set of protocol, methodology, and verification features, e…
The ODT-LDO100M-T28 is a low dropout (LDO), linear regulator for integration in a SoC.
Universal Flash Storage (UFS) is a JEDEC standard for high performance mobile storage devices suitable for next generation data s…
PDM Receiver/PDM-to-PCM Converter
This PDM2PCM is a configurable audio interface core that converts a mono or stereo Pulse Density Modulation (PDM) stream into sta…
These cores implement a Bose-Chaudhuri-Hocquenghem (BCH) error correction code configured to process a k-bit codeword, providing …
5G-NTN Modem IP for Satellite User Terminals
PentaG-NTN is a 5G Non Terrestrial Network (NTN) modem IP subsystem optimized for satellite user terminals operating in LEO and M…
5G-Advanced Modem IP for Edge and IoT Applications
PentaG-Edge is a 5G- modem IP subsystem optimized for terrestrial edge and IoT deployments, including industrial and private 5G n…
TSN Ethernet Endpoint Controller 10Gbps
The TSN-EP-10G implements a configurable controller meant to ease the implementation of endpoints for networks complying with the…
Kamaten frequency dividers reduce input digital signal (clock) frequency and can be set to any integer division ratio from 1 to 8…
Multi-channel Ultra Ethernet TSS Complete Layer
solution for UET-TSS protocol with rates up to 1.6Tbps In the data center environment, the servers, storage and AI/HPC clusters n…
Multi-channel Ultra Ethernet TSS Transform Engine
Solution for UET-TSS transform with rates up to 1.6Tbps In the data center environment, the servers, storage and AI/HPC clusters …
Stand-Alone ESD Cell in GF 28nm
A GlobalFoundries 28nm Stand-Alone ESD Structure This ESD library is a silicon-proven set of discrete, pad-independent ESD clamps…
I/O Library with LVDS in SkyWater 90nm
Standard GPIO, I2C-compatible ODIO, analog I/O, and integrated LVDS for robust mixed-signal and moderate-speed differential interfaces