Semiconductor IP Cores

The Cortex-A7 processor provides up to 20% more single thread performance than the Cortex-A5 and incorporates all features of the…

• ARM

The Cortex-A53 processor has one to four cores, each with an L1 memory system and a single shared L2 cache.

• ARM

The Arm Cortex-A35 processor is the most power-efficient application processor capable of seamlessly supporting 32-bit and 64-bit…

• ARM

The Arm® Cortex®-A32 processor is the smallest, lowest-power Armv8-A processor optimized for 32-bit embedded applications.

• ARM

Atomic Rules TimeServo is a RTL IP core that serves the function of an FPGA’s System Timer or Clock.

• Timers & Watchdogs

The CC-WDT-AXI is a synthesisable Verilog model of a watchdog timer controller.

• Timers & Watchdogs
• Now
• AXI4-Lite

The CC-WDT-APB is a synthesisable Verilog model of a watchdog timer controller.

• Timers & Watchdogs
• Now
• APB

The CC-SYSTICK-AXI is a synthesisable Verilog model of a system tick timer counter controller.

• Timers & Watchdogs
• Now
• AXI4-Lite

The CC-SYSTICK-APB is a synthesisable Verilog model of a system tick timer counter controller.

• Timers & Watchdogs
• Now
• APB

The CC-TIMER-AXI is a synthesisable Verilog model of a timer counter controller.

• Timers & Watchdogs
• Now
• AXI4-Lite

The CC-TIMER-APB is a synthesisable Verilog model timer counter controller.

• Timers & Watchdogs
• Now
• APB

The CC-PDMA-AXI-AXI is a synthesisable Verilog model of a peripheral direct memory access controller.

• DMA
• Now
• AXI4, AXI4-Lite

The CC-PDMA-APB-AHB is a synthesisable Verilog model of a peripheral direct memory access controller.

• DMA
• Now
• AHB-Lite, APB

The CC-UART-AXI is a synthesisable Verilog model of a UART serial interface controller.

• UART
• AXI4-Lite

The CC-UART-APB is a synthesisable Verilog model of a UART serial interface controller.

• UART
• APB

The CC-SPI-AXI is a synthesisable Verilog model of a SPI serial peripheral interface Master/Slave controller.

• SPI / QSPI XSPI
• Now
• AXI4-Lite

The CC-I2C_MST-AXI is a synthesisable Verilog model of a I2C serial interface controller.

• I2C / I3C
• Now
• AXI4-Lite

The CC-SPI-APB is a synthesisable Verilog model of a SPI serial peripheral interface Master/Slave controller.

• SPI / QSPI XSPI
• Now
• APB

The CC-I2C_MST-APB is a synthesisable Verilog model of a I2C serial interface controller.

• I2C / I3C
• Now
• APB

LTIMindtree IEEE 802.15.4 MAC and PHY semiconductor Intellectual Property (IP) is based on IEEE 802.15.4 specification.

• Wi-Fi
• In Production
• Now available
• IEEE 802.15.4 - MAC and PHY