Ka-Band beamforming and transceiver ASIC platform
The ENS92030 is a versatile multi-channel, Ka-Band frequency, beamforming transceiver IC for phased-array electronically steerabl…
- RF Transceiver
- Silicon proven
- Now
- DVB-S2 DVB-RSC2
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Ka-Band beamforming and transceiver ASIC platform
The ENS92030 is a versatile multi-channel, Ka-Band frequency, beamforming transceiver IC for phased-array electronically steerabl…
Local Interconnect Network (LIN) Soft Controller IP
The DLIN is a soft core of the Local Interconnect Network (LIN).
7.8 GHz to 9.1 GHz Microwave Fractional – N Synthesizer
The WEA89S22G is a 24 bits Fractional-N microwave synthesizer able to synthesize frequencies from 7 GHz to 9 GHz with the integra…
AXI4 to/from AXI4-Stream Scatter-Gather DMA
The AXI4-SGDMA IP core implements a Host-to-Peripheral (H2P), or a Peripheral-to-Host (P2H) Direct Memory Access (DMA) engine, wh…
1.16 to 1.26 and 1.56 to 1.61 GHz low noise amplifier with 27.5dB gain
350AMS_LNA_04 is a common receiver front-end device which is used to provide impedance matching to off-chip circuits and to perfo…
JPEG Encoder Full HD(YUV422) 30fps@126MHz(1Sample/clk)
The KJN-F1ENC conform to the JPEG baseline format for compressing still images.
JPEG Codec Full HD(YUV422) 30fps@126MHz(1Sample/clk)
The KJN-F1 conform to the JPEG baseline format for compressing/decompressing still images.
MIPI CSI-2 Transmitter for FPGA
MIPI CSI-2 Tx - IP core for FPGA which based on CSI-2 standard : Camera - Application Processer
MIPI CSI-2 Rx - IP core for FPGA which based on CSI-2 standard : Camera - Application Processor.
Features a mixed-signal architecture that addresses the challenges of DRAM integration in high-performance and low-power environm…
Convolutional FEC codes are very popular because of their error correction capability and are especially suited for correcting ra…
In Digital video broadcasting for digital transmission for satellite applications, a FEC sub-system is needed.
This design is a ISDB-S3-LDPC-BCH Decoder IP, ready to license, verified and packaged, and supplied as a portable and synthesizab…
XPHY Low power Chip to Chip SerDes IP, Silicon Proven in ST 28FDSOI
These IPs are targeted at applications requiring high speed, high bandwidth, low-power consumption, and low-latency interfaces.
V-by-One/LVDS Tx IP, Silicon Proven in GF 22FDX
Based on internal equipment connections, the V-by-One® HS technology aims to transmit video signals at high data rates.
V-by-One/LVDS Rx IP, Silicon Proven in GF 22FDX
The V-by-One® HS technology aims to transmit video signals at a high data rate using internal equipment connections.
Serial Peripheral Interface - Master/Slave with single, dual, quad and octal SPI Bus support
The DOSPI is a revolutionary octal SPI designed to offer the fastest operations available for any serial SPI memory.
Advanced Encryption Standard Cryptographic Co-Processor
The DAES IP Core is a high-performance AES hardware accelerator designed to execute Encryption Standard (AES) operations with exc…
V-by-One Rx IP, Silicon Proven in SMIC 40LL
The V-by-One HS technology aims to transmit video signals at a high data rate using internal equipment connections.
V-by-One Tx IP, Silicon Proven in SMIC 40LL
V-by-One HS technology targets a high-speed data transmission of video signals based on the internal connection of equipment.