VS1114FE is low-power, low noise 8-channel fully differential or 16 pseudo differential inputs, 24-bit, (??) analog-to-digital co…
- Analog Front End
- Silicon validated
- June 2022
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
VS1114FE is low-power, low noise 8-channel fully differential or 16 pseudo differential inputs, 24-bit, (??) analog-to-digital co…
The 24b ADC IP has a fourth-order, inherently stable, delta-sigma (??) modulator that provides good noise and linearity performan…
The 24b ADC IP has a fourth-order, inherently stable, delta-sigma (??) modulator that provides good noise and linearity performan…
24-bit 128Ksps Analog front end (AFE) having sigma delta ADC for Energy Metering application
The 24b ADC IP has a fourth-order, inherently stable, delta-sigma (??) modulator that provides good noise and linearity performan…
12-bit, 6MS/s ADC for Microcontroller Business in Samsung LFR6LP
AD12BSAR6MLFR6LP is a 12-bit Successive Approximation Analog-to-Digital Converter (ADC) that operates up to 6MS/s.
Video Processing Unit IP The VPU IP is a video processing system that is suitable for high-speed and high resolution video system…
Xiphera’s nQrux® Crypto Module IP core provides a comprehensive security platform that allows for customisation of top-notch cryp…
The Compute Express Link® (CXL®) 3.1 Controller is a parameterizable design for ASIC and FPGA implementations.
High performance GPU for cloud gaming with DirectX support
IMG DXD is the first product in a new line of high-performance GPU IP with support for DirectX*.
Low-power, long-reach, multi-protocol PHY for PCIe 4.0
The first IP for PCIe 3.1 with L1 sub-states support
Configurable Ascon IP for FPGA and ASIC
Zyxx Ascon IP is an Intellectual Property implementing the ASCON (Authenticated Sponge CONstruction) cryptographic algorithm in v…
ChevinID™ intelligently identifies malicious or accidental changes that occur during the production process.
Performance AI Accelerator for Edge Computing
The NeuroMosaic Processor (NMP) family is shattering the barriers to deploying ML by delivering a general-purpose architecture an…
Performance Efficiency AI Accelerator
The NeuroMosaic Processor (NMP) family is shattering the barriers to deploying ML by delivering a general-purpose architecture an…
Lowest Power and Cost End Point AI Accelerator
The NeuroMosaic Processor (NMP) family is shattering the barriers to deploying ML by delivering a general-purpose architecture an…
Highly scalable performance for classic and generative on-device and edge AI solutions
Scalable and Power-Efficient Neural Processing Units The Neo NPUs offer energy-efficient hardware-based AI engines that can be pa…
NR-5G Polar Decoder and Encoder
The Forward Error Correction (FEC) sub-system is one of the essential basing blocks in any communication systems so a FEC code is…
ASCON Authenticated Encryption & Hashing Engine
The ASCON-F IP core is a compact, high-throughput hardware engine implementing the lightweight authenticated encryption with asso…
Wide range of dedicated, high performance, low latency RS FEC IP cores to meet any error correction requirement The Reed Solomon …