The (Delay-Locked Loop) DLL PHY is a mix-signal circuit used in low-power and high-speed applications to align and synchronize cl…
- DLL
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
The (Delay-Locked Loop) DLL PHY is a mix-signal circuit used in low-power and high-speed applications to align and synchronize cl…
MIPI C/D-PHY CSI/DSI TX and RX
The MIPI C/D-PHY + DSI/CSI Controller IP is a versatile solution designed for high-speed data transmission in mobile and multimed…
The M-PHY implements MIPI M-PHY protocol V4.1.
The LVDS implements LVDS TIA/EIA protocol, providing a low-voltage, high-speed point-to-point signal interface.
The Audio CODEC IP is a low power, high resolution, stereo audio solution which leverages Sigma-Delta noise-shaping technology.
Ultra-Low-Power Bandgap Voltage Reference in 40nm CMOS
The ODT-REF-SV1P8-ULP140N_40 is an ultralow power CMOS bandgap reference designed in a 40nm standard CMOS process without needing…
Ultra-Low-Power Temperature/Voltage Monitor in 28nm CMOS
The ODT-TVM-ULP-001C-28 is an ultra-low power temperature and voltage monitor designed in a 28nm standard CMOS process.
Ultra-Low-Power Temperature/Voltage Monitor in 40nm CMOS
The ODT-TVM-ULP-001C-40 is an ultra-low power temperature and voltage monitor designed in a standard 40nm CMOS process.
HDMI2.1/2.0/1.4 TX and RX PHY & Controller
The HDMI IP is designed for transmitting or receiving video and audio signals between the video source devices and display device…
12-bit, 8-GSPS DAC Ultra Low Power on 7nm
The ODT-DAC-12B8G-7nm is a highperformance current steering 12-bit DAC that operates at an update rate of up to 8GSPS.
12-bit, 8 GSPS ADC in 7nm CMOS
The ODT-ADS-12B8G-7nm is an ultra-highperformance time-interleaved ADC designed in a 7nm CMOS process.
PCIe 5.0/4.0/3.0 PHY & Controller
The PCIe 5.0 IP solutions combine high-performance controllers and PHYs, fully compliant with PCIe 5.0/4.0/3.0, and PIPE specific…
The AXI4-DMA IP core implements a Direct Memory Access (DMA) engine that efficiently moves data between AXI4-Stream peripherals a…
The 32G SerDes PHY is a configurable IP solution capable of supporting data rates of up to 32 Gbps per lane.
The 64G SerDes PHY is a configurable PHY capable of supporting speeds up to 64Gbps within a single lane.
The DDR IP Mixed-Signal MR PSRAM PHY and RPC PHY provide turnkey physical interface solutions for ICs requiring access to JEDEC c…
LPDDR5X/5/4X/4 PHY & Controller
The LPDDR IP includes a LPDDR5X/5/4X/4 Combo PHY and controller.
HBM4/3E Combo PHY & Controller
The fourth-generation and third-generation HBM (HBM4/3E) technology is outlined by the JESD238A standard (for HBM3E) and an upcom…
Future-proof IP for training and inference with leading performance per watt and per dollar
Tenstorrent develops AI IP with precision, anchored in RISC-V’s open architecture, delivering specialized, silicon-proven solutio…
The D68000-CPU32+ soft core is binary-compatible with the industry standard 68000’s CPU32+ version of the 32-bit microcontroller.