MIPI DPHY Gen2 Bidirectional 4 Lanes - GF 28SLP 1.8V, East/West Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Gen2 Bidirectional 2 Lanes - GF 28SLP 1.8V, East/West Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Bidirectional 4 Lanes - GF 22FDSOI18, N/S, for Automotive, ASIL B Random, AEC-Q100 Grade 1
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Gen2 Bidirectional 4 Lanes -Fujitsu 40LP25
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolut…
HDMI 1.4/2.0/2.1 transmitter IP
HDMI 1.4/2.0/2.1 transmitter IP
HDMI 1.4/2.0/2.1 receiver IP
USB-C 3.1/DP TX PHY for TSMC 7FF, North/South Poly Orientation
The USB 3.1 PHY IP provides designers with the industry's best combination of low area and low power with support for the process…
USB-C 3.1/DP TX PHY for TSMC 16FFC, North/South Poly Orientation
The USB 3.1 PHY IP provides designers with the industry's best combination of low area and low power with support for the process…
USB-C 3.1/DP TX PHY for TSMC 12FFC, North/South Poly Orientation
The USB 3.1 PHY IP provides designers with the industry's best combination of low area and low power with support for the process…
USB-C 3.1/DP TX PHY for Samsung 14LPP, North/South Poly Orientation
The USB 3.1 PHY IP provides designers with the industry's best combination of low area and low power with support for the process…
USB-C 3.1/DP TX PHY for Samsung 11LPP, North/South Poly Orientation
The USB 3.1 PHY IP provides designers with the industry's best combination of low area and low power with support for the process…
The DDR3/2 PHY cores are mixed-signal PHY IP cores that supply the physical interface to JEDEC standard DDR3 and DDR2 SDRAM memor…
ONFI PHY 4.8GT/s for ONFI v6 & JESD230G
The ONFI multi-PHY is a versatile solution that accommodates ONFI4.0 to ONFI6.0 NAND flash interfaces, offering impressive speeds…
LPDDR 4/4X PHY, TSMC 12E, N/S orientation
The LPDDR4X multi-PHY supports both LPDDR4 and LPDDR4X memory interfaces at speed up to 4267Mbps, making it an ideal solution for…
PCIe Gen5/CXL combo PHY, x2-lane, RC/EP, TSMC 12FFC, N/S orientation
The PCIe 5.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications.
PCIe Gen5 PHY, x2-lane, RC/EP, TSMC 12FFC, N/S orientation
The PCIe 5.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications.
USB2.0 Dual-Role PHY, SMIC 55LL
M31 provides customers the next generation of USB 2.0 IP with an extremely compact die area and lower active and suspend power co…
USB2.0 Dual-Role PHY, SMIC 40LL
M31 provides customers the next generation of USB 2.0 IP with an extremely compact die area and lower active and suspend power co…
USB2.0 Dual-Role PHY, HLMC 40LP
M31 provides customers the next generation of USB 2.0 IP with an extremely compact die area and lower active and suspend power co…