100G UDP/IP Hardware Protocol Stack Core
The core Implements a UDP/IP hardware protocol stack that enables high-speed communication over a LAN or a point-to-point connect…
- Ethernet
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
100G UDP/IP Hardware Protocol Stack Core
The core Implements a UDP/IP hardware protocol stack that enables high-speed communication over a LAN or a point-to-point connect…
1.6T/3.2T Multi-Channel MACsec Engine with TDM Interface (MACsec-IP-364)
MACsec solution for data center, service providers, 5G and AI The MACsec-IP-364 is a MACsec/IPsec engine developed specifically f…
XY2_SCALER is a very high quality video scaler capable of generating interpolated output images from 16x16 up to 216 x 216 pixels…
TSMC CLN5FF GUCIe LP Die-to-Die PHY
IGAD2DY11A is an LP (Low Power) Die-to-Die (D2D) PHY for SoIC-X Face-to-Face package.
Ultra Ethernet Verification IP
The Ultra Ethernet (UE) Verification IP provides an effective & efficient way to verify the components interfacing with Ethernet …
Shaped Offset Quadrature Phase Shift Keying - Telemetry Group (SOQPSK-TG) is a type of QPSK/OQPSK modulation.
Up to 64 byte data transfer in CAN FD frames The DMU signals to the attached DMA Controller (DMA request) when there is a newly r…
Measure delay between edges of a signal(s) The SLM Clock & Delay Monitor (CDM) IP can be implemented in silicon with minimal area…
The SLM Signal Integrity Monitor (SIM) IP enables signal quality measurement for die-to-die interfaces.
The ApSRAM controller is a flexible, low-power, and low-latency solution designed for SRAM replacement in high-performance system…
PQC CRYSTALS core for accelerating NIST FIPS 202 FIPS 203 and FIPS 204
eSi-Crystals is a hardware core for accelerating the high-level operations specified in the NIST FIPS 202, FIPS 203 and FIPS 204 …
Bluetooth Low Energy Subsystem IP – v6.0
SB1001-CM is a full single-source BLE 6.0 Subsystem IP, consisting of an integrated Controller and Modem.
Bluetooth Low Energy Subsystem IP
The BLE v6.0 Subsystem IP consists of an integrated Controller and Modem paired to a proprietary RF on T22 ULL.
The CXL Controller IP is micro-architected with power, performance, and area optimization for high bandwidth, minimum latency, an…
LZ4SNP-C is a custom hardware implementation of a lossless data compression engine that complies with the LZ4 and Snappy compress…
The HBM4 Verification IP provides an effective & efficient way to verify the components interfacing with HBM interface of an ASIC…
The LPDDR6 Verification IP provides an effective & efficient way to verify the LPDDR6 components of an IP or SoC.
The DDR6 Verification IP provides an effective & efficient way to verify the components interfacing with DDR6 interface of an ASI…
NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
The IP block provides the physical layer implementation of ISO 14443 interface.
NFC wireless interface supporting ISO14443 A and B on SMIC 180nm
The IP block provides the physical layer implementation of ISO 14443 interface.