Low Drop-Out Linear Regulator
The agileLDO is a linear Low Drop-Out voltage regulator (LDO) providing precision and programmable voltage regulation.
Overview
The agileLDO is a linear Low Drop-Out voltage regulator (LDO) providing precision and programmable voltage regulation. The regulator architecture provides a high dynamic performance making it suitable for demanding digital applications. Whilst the low noise and high PSRR lends itself to powering noise-sensitive analog circuits. We have a selection of LDOs, with both capless and externally biased options, supporting a wide range of input voltage, output voltage, and output current.
Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. We support all the major foundries including TSMC, GlobalFoundries, Intel Foundry, Samsung Foundry, UMC and Other Foundries.
Key features
- Input Voltage Range: PDK VddIO
- Programmable Output Voltage Range
- Current Load: <1mA to 100mA
- PSRR
- @DC Typ: 40dB
- @1MHz Typ: 20dB
- Load Regulation: Typ 0.3 %/V
- Line Regulation: Typ 50mV/A
- Quiescent current (Iq): Typ 100uA
- Customizable design for simple SoC integration
- Integrated Test Mode
Block Diagram
Benefits
- High Performance
- - Low Noise and High PSSR for noise-sensitive analog circuits
- Sense Input
- - Low Noise and High PSSR for noise-sensitive analog circuits
Applications
- IoT, Security, Automotive, AI, SoCs, ASICs
What’s Included?
- Datasheet
- Testing and Integration Guide
- Verilog Models
- Floorplan (LEF)
- Timing models (LIB)
- Netlist (CDL)
- Layout (GDS)
- Physical Verification Report
- Design Report
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
Learn more about LDO Voltage Regulator IP core
The pivotal role power management IP plays in chip design
The Tradeoffs of Low Dropout (LDO) Voltage Regulator Architectures and the Advantages of "Capless" LDOs
Power Management for Internet of Things (IoT) System on a Chip (SoC) Development
Power management poses challenges
Tradeoffs of LDO Architectures and the Advantages of Advanced Architecture "Capless" LDOs
Frequently asked questions about LDO Voltage Regulator IP cores
What is Low Drop-Out Linear Regulator?
Low Drop-Out Linear Regulator is a LDO Voltage Regulator IP core from Agile Analog listed on Semi IP Hub.
How should engineers evaluate this LDO Voltage Regulator?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this LDO Voltage Regulator IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.