Vendor: Curious Corp. Category: MIPI PHY

MIPI D-PHY Transmitter 4-Lane (4-Data/1-Clock) 250Mbps

The CL12631I4T1AS1BIP2500 is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to Host System.

MIPI D-PHY View all specifications

Overview

The CL12631I4T1AS1BIP2500 is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to Host System.

The CL12631I4T1AS1BIP2500 converts the input parallel data to the serial data and output it.

The CL12631I4T1AS1BIP2500 is designed to support maximum 2.5Gbps data rate utilizing mipi-DPHY_specification_v1-2.

Key features

  • MIPI-DPHY v1-2 / MIPI CSI2 compliant
  • Supporting Differential Output Signals: MIPI-DPHY (Maximum 2.5Gbps)
  • Input Clock Frequency: (MIPI-DPHY 8bit SER) PCK_N= ~313MHz
  • Output Clock Frequency: ~1250MHz Output Data Rate: ~2.5Gbps
  • Power Supply : 2.8V, 1.2V(PLL/BGR) 1.2V(PHY)
  • Max TX Lane Number: Clock 1-port / Data 4-ports (lanes)
  • Data Input Path: 8bit Parallel
  • Include Power Down Mode
  • Include Output clock's On/Off Mode
  • Include Dp, Dm polarity Control
  • TPSCo 65nm BSB Process
    • Triple well structure Layer: 7M/1L (1M~6M, 9M, L) 1.2V / 3.3V Transistor
  • Various process porting support available (Please contact us.)
  • Supporting Link-layer (Soft Macro): CD12631

Benefits

  • We are IP design professional engineering company, so we can provide the high quality and good performance solution. Also we can provide not only single-interface PHY but also multi-interface PHY.
  • We are making the PHY to meet customer specification by having our own IP data base resource. Our business is very flexibility IP license model, and then we have a lot of license to many sensor companies.
  • Our products can contribute to your business.

Applications

  • Camera Application
  • Security Camera
  • Mobile-Phone Camera
  • DSC(Digital Still Camera)
  • Medical Camera
  • SLR
  • 3D Camera
  • Camcorder
  • ISP(Image Signal Processer)

What’s Included?

  • Verilog Model (verilog / vcs)
  • .db file / .lib(Option) file
  • symbol / LVS netlist / Hspice netlist(Option)
  • LEF, layer map file, layout technology file
  • Layout Verification Report (DRC & LVS), Command file
  • Datasheet (This file) /Application Note (Usage connection CIS)
  • Packaging and Layout Guideline / PCB Guideline
  • Static Delay Analysis (STA) Guideline
  • Testing Guideline (Option)
  • TX or RX Verilog Model and Test Vector(Option)
  • CMOS Image Sensor Verilog Models(Option)
  • Combo Link Layer IP(CD12631IP) and FPGA Board(Option)

Specifications

Identity

Part Number
CL12631I4T1AS1BIP2500
Vendor
Curious Corp.
Type
Silicon IP

Standards & Interfaces

MIPI PHY
MIPI D-PHY

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Curious Corp.
HQ: Japan

Frequently asked questions about MIPI PHY IP

What is MIPI D-PHY Transmitter 4-Lane (4-Data/1-Clock) 250Mbps?

MIPI D-PHY Transmitter 4-Lane (4-Data/1-Clock) 250Mbps is a MIPI PHY IP core from Curious Corp. listed on Semi IP Hub.

How should engineers evaluate this MIPI PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MIPI PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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