37 Billion IC with MTP IP from now to 2015: clearly, Kilopass and GlobalFoundries partnership make sense...
Eric Esteve
Vendor:
Floadia Corporation
Category:
MTP
Zero Additional Mask MTP
LEE Flash ZT (ZT) achieves automotive grade temperature and quality grade.
Overview
LEE Flash ZT (ZT) achieves automotive grade temperature and quality grade.
Perfect fit for trimming and parameter storage in Sensor, Power and Analog ICs especially for automotive applications.
It also achieves low cost implementation due to its very short test time and baking time while you need Zero additional mask or process step in manufacturing.
It supports process nodes down to around 40nm and P/E cycle up to 10K times.
| Item | Spec |
|---|---|
| Process platform | 180BCD |
| Memory Size | 512 Bytes(4K bits) |
| P/E Cycles | > 100k |
| Supply Voltage | VDD 2.5V~5.5V |
| Additional Masks | 0 |
| Operation Temperature(Tj) | -40~150℃ |
| Data Retention |
20years@-40~150℃ |
High Temperature Operation
ZT can support 20 years of retention at 125°C. ZT has track record in supporting Automotive quality.
Large Program Size enables Short Testing Time
ZT uses FN tunneling technology to achieve extremely low power in program and erase.
It consumes 1/1,000,000 times current, compared to conventional technologies which use hot carrier injection for program/erase operation.
This also helps reducing testing time, which dominates large portion of the chip cost.
Low Cost
Short Test Time: ZT achieves very short test time for two reasons.
- Extremely low power in program/erase allows tester to program/erase the whole memory mat at once, compared to conventional solution program/erase smaller sections for many many times to program/erase the whole memory mat.
- Sharp Vt distribution in programming will eliminate the requirement for multiple programming and verification, so that programming operation always completes at one time, not in multiple steps, to dramatically reduce programming time.
Short Baking Time
Floadia’s unique memory architecture simplifies Life Time Prediction of the memory cell, which allows chip company to screen devices with shorter baking time.
Zero Mask
ZT requires no change and no additional mask on standard CMOS process, reducing expensive mask cost to implement NVM feature on your chip.
Field Programmability
Floadia’s ZT allows system company to program NVM when they ship end system product, or even while the system is in the field and running, to adjust trimming/parameter setting.
Key features
- Supports high temperature and long retention life time for severe automotive requirement.
- Low power in Program/Erase operation for power critical applications.
- Short Test and Bake time to reduce chip cost.
- Standard CMOS process for re-using existing design and IP.
- No additional mask required for easy implementation.
Block Diagram
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Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| HHGrace | 180nm | BCD | In Production |
Specifications
Identity
Part Number
LEE Flash-ZT
Vendor
Floadia Corporation
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
Japan
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Frequently asked questions about MTP Memory IP cores
What is Zero Additional Mask MTP?
Zero Additional Mask MTP is a MTP IP core from Floadia Corporation listed on Semi IP Hub. It is listed with support for hhgrace In Production.
How should engineers evaluate this MTP?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MTP IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.