Floadia Announces MTP IP without extra Mask Available on 55nm
Tokyo, Japan -- Oct 31st, 2022 – Floadia Corporation (Floadia), a leading provider of embedded non-volatile memory intellectual property (IP) announces that its high-quality Multi-Time Programmable memory IP (MTP) is now available on the 55nm process platform with the product name “ZT”, which is capable of 10 years data retention at 85 degrees Celsius.
Traditionally, MTP IP without extra masks is fully compatible with standard logic processes. In general, such MTP can only be enabled at process node with the oxide thickness thicker than 100 Angstroms. However, such traditional MTP developments face challenges in sustaining good reliability due to oxide thickness scaling along with process migration. As process nodes move beyond 55nm, it becomes very difficult to develop reliable MTP due to thin oxides that cannot sustain good data retention. Despite such difficulties, MTP of small density will be all-time requirements. Applications in sub-55nm process geometries that require very small MTP densities for code storage are forced to switch to eflash IP, typically requiring more than 10 additional masks, driving up the overall chip cost. By adopting special cell layout and design technics, Floadia's ZT can achieve 10 years data retention at 85 degrees Celsius after 10,000 program/erase cycles without adding any additional mask and is now available on 55nm platform at one major foundry headquartered in China.
Floadia ZT has already been adopted by Japanese IDM and foundries for a variety of automotive applications including drive line system, pressure sensor, motor driver and engine control system chip. The newly unveiled ZT IP on the 55nm process platform is a 1kbit macro, and is a good fit for consumer applications to replace external discrete EEPROM components. By adopting ZT IP instead of having discrete EEPROM component, it can increase the chip integration level, reduce the BOM cost and PCB size, and create compact form factor. In the meantime, ZT uses the FN tunneling methodology to achieve low power consumption during the program and erase operations. ZT has also been adopted by a Chinese chip maker for its smart lighting product planned to be market-ready in 2023.
About Floadia
Floadia was established in 2011 and a spin-out of experienced engineers who were developing embedded non-volatile memory at Hitachi/Renesas for more than 20 years. Floadia licenses its intellectual property (IP), including manufacturing process and circuit designs, necessary for the embedded memory production. Floadia’s development team comprises not only circuit designers but also engineers with expertise in the manufacturing process. Currently Floadia has over 200 patents, filed and pending.
Related Semiconductor IP
- 55nmHV MTP Non Volatile Memory for Standard CMOS Logic Process
- MTP Non Volatile Memory for TSMC 180nm BCD Process
- 180nm MTP Non Volatile Memory for Standard CMOS Logic Process
- NVM MTP EEPROM TSMC 65nm LP 2.5V SVT, SVT/HVT
- NVM MTP EEPROM TSMC 40nm LP 2.5V
Related News
- Floadia Releases Automotive Embedded Flash IP on TSMC 180BCD Gen3 Platform
- Floadia Releases High-Performance Automotive Embedded Flash IP on Leading Foundry’s 90BCD Platform
- Physical verification tool makes direct mask link
- IC Mask Design delivers on Motorola's latest chip design
Latest News
- Openchip unveils BER10: Europe’s new sovereign chip is here
- SEMIFIVE Accelerates Growth with 97% YoY Revenue Surge in H1 2026, Powered by ASIC Turnkey, Mass Production, and IP
- Andes Technology has shut down Condor Computing
- TIER IV joins JST’s Next-Generation Edge AI Semiconductor R&D Program to open-source AI chip designs for autonomous driving
- BrainChip Partners With Orama.AOI For AI-Fueled Defect Detection