What is Display Processing IP?
Display Processing IP is a Display Controller IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub.
Cost Efficient and Low-Power Design for MCUs, Wearables, and AIoT Devices
Cost Efficient and Low-Power Design for MCUs, Wearables, and AIoT Devices
VeriSilicon's Vivante DCNano series IPs are small-footprint, cost efficient, and low-power display controllers targeting wearable devices including smart watches and AR glasses, MCUs, AIoT, and IP cameras (IPC). Currently consisting of DCNano and DCNanoUltra, this series supports compressed and non-compressed inputs. DCNano series also provides diverse pre-processing and post processing features such as rotation and flip, swizzle, color space conversion, blending, and dithering.
| Feature | DCNano | DCNanoUltra |
| Target Ul performance | 1280x720@60 fps (tiled format) 1920x1080@60 fps (linear format) |
1280x720@60 fps (tiled format) 1920x1080@60 fps (linear format) |
| Supported API | Vivante DRM display API Vivante DCLite display API |
Vivante DRM display API Vivante DCLite display API |
| Supported output devices | 1 | 2 |
| Configurable layer numbers | 3 | 4 |
| Cursor layer | Optional | Optional |
| Frame buffer compression | Yes | Yes |
| Output pixel formats | RGB888, RGB565, and RGB666 | RGB888, RGB565, and RGB666 |
| Pixels per cycle | 1 | 1 |
Highlights
Pre-Processing Features
Post-Processing Features
Display Interfaces
Software Support
Note: some files may require an NDA depending on provider policy.
Display Processing IP is a Display Controller IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub.
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Display Controller IP.
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.