Vendor:
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Category:
Display Controller
Display Processing IP
High-Performance and Low-Power Design for Automotive
Overview
VeriSilicon Vivante DC8200-FS Display Processing IP is designed specifically for the safe display and multi-layer processing of automotive and industrial applications to minimize the risk of accidents and injuries caused by hardware-related issues. In compliance with ISO 26262 for ASIL-B, the IP provides safe mechanisms such as memory protection and register configuration path protection.
| Feature | DC8200-FS-2K | DC8200-FS-4K |
| Maximum display resolution for single output device | 2K@240Hz | 4K@60Hz |
| Maximum display resolution for multiple output devices | 2K@240Hz | 4K@120Hz |
| Display output channels supported | 2 | 2 |
| Number of video/graphic and overlay layers | 8 | 8 |
| 10-bit format support | Yes | Yes |
| Pixel rate (pixels per cycle) | 1 | 1 |
Key features
Highlights
- Support for both single-OS mode and dual-OS mode
- On-the-fly pixel processing pipelines
- Dynamic layer allocation between the two output panels
- Unified frame buffer compression
Safety Mechanism Features
- Memory and registers parity
- AXI, AHB parity and transaction protection
- Critical unit duplication
- CRC data protection
- Memory ECC data protection
- Safety error management unit
Layers and Pre-Processing Features
- Rotation and flip
- Color keying
- Scaling
- Programmable color space conversion: YUV-to-RGB, RGB-to-RGB
- De-gamma
- ROI partial image
- Swizzle
- QoS management
Post-Processing Features
- Alpha blending
- Programmable color correction matrix (CCM)
- 3D LUT
- Gamma correction and dithering
- RGB-to-YUV conversion
Display Interfaces
- DP
- DPI
Input Formats
- A/XRGB8888, A2R10G10B10, A/XRGB1555, RGB565, A/XRGB4444, RGB888
- YV12, NV12, P010 (10-bit), NV16, YUY2, UYVY, YUV444
Output Formats
- RGB formats supported by DP/DPI interface: 16-bit color coding for RGB565, 18-bit color coding for RGB666, 24-bit color coding RGB888, 30-bit color coding for RGB101010
- YUV formats supported by DP interface: 8/10-bit YUV444/YUV422/YUV420
Advanced and Miscellaneous Features
- DDR write-back
- DEC400 lossless decompression
- Double-buffered register
- Clock gating for RAM and each layer
- MMU support
- CRC-32 calculation with at most 17 regions
Software and OS Support
- OS supported: Linux, Android, Windows
- Drivers supported
- Vivante DRM display driver
- Vivante DPU display driver
Specifications
Identity
Part Number
Vivante DC8200-FS
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about Display Controller IP
What is Display Processing IP?
Display Processing IP is a Display Controller IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub.
How should engineers evaluate this Display Controller?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Display Controller IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.