The USB1.1 PHY is an IP version of USB transceiver.
- UCIe 1.1
VeriSilicon Microelectronics (Shanghai) Co., Ltd. (VeriSilicon, 688521.SH) is a leading public company that provides custom silicon solutions, leveraging its comprehensive and proprietary portfolio of semiconductor IPs.
VeriSilicon possesses six categories of in-house processing IPs, namely Graphics Processing Unit (GPU) IP, Neural Network Processing Unit (NPU) IP, Video Processing Unit (VPU) IP, Digital Signal Processing (DSP) IP, Image Signal Processing (ISP) IP, and Display Processing IP, as well as more than 1,700 analog and mixed-signal IPs, RF IPs, and interface IPs.
Leveraging its own IPs, VeriSilicon has developed a wealth of software and hardware custom chip design platforms targeting Artificial Intelligence (AI) applications, covering always-on ultralight spatial computing devices such as smartwatches and AI/AR glasses, high-efficiency edge computing devices such as AI PCs, AI phones, smart cars, and robots, as well as high-performance cloud computing devices like data centers and servers.
In response to the trend of System-on-Chip (SoC) evolving towards System-in-Package (SiP) driven by the demand for large computing power, VeriSilicon put forward the concepts of "IP as a Chiplet”, "Chiplet as a Platform", and "Platform as an Ecosystem”. The company keeps advancing the R&D and industrialization of its Chiplet technologies and projects from the perspective of interface IP, Chiplet architecture, advanced packaging technology, and others for AI-Generated Content (AIGC) and autonomous driving solutions.
Under its unique “Silicon Platform as a Service” (SiPaaS) business model, VeriSilicon serves a broad range of market segments, including consumer electronics, automotive electronics, computer and peripheral, industrial, data processing, Internet of Things (IoT), among others. Its main customers include fabless, IDM, system vendors (OEM/ODM), large internet companies, and cloud service providers.
Founded in 2001 and headquartered in Shanghai, China, VeriSilicon has 9 design and R&D centers, along with 11 sales and customer service offices worldwide. VeriSilicon currently has more than 2,000 employees.
The USB1.1 PHY is an IP version of USB transceiver.
This IP is a programmable Analog PLL suitable for high speed clock generation.
VeriSilicon GSMC 0.18um (LP) 1.8V/3.3V Multiple I/O
VeriSilicon GSMC 0.18um (LP) 1.8V/3.3V Multiple I/O Cell (01E) Library developed by VeriSilicon is optimized for Grace Semiconduc…
The present IP is a VCC Detector (VDT) circuit.
The present IP is a VCC Detector (VDT) circuit.
GSMC 0.18um 3.3V Trimming Block
This IP is suitable for voltage trimming.
VeriSilicon GSMC 0.18um Synchronous Programmable Low Power Via1 ROM compiler optimized for Grace Semiconductor Manufacturing Corp…
VeriSilicon GSMC 0.18um General Process, Low Power circuit design, Diffusion ROM
VeriSilicon GSMC 0.18um Synchronous Low Power Diffusion ROM compiler optimized for Grace Semiconductor Manufacturing Corporation …
GSMC 0.18um 3.3v RC oscillator with internal R and C to generate 32±20%KHz clock.
The present IP is a RC oscillator with internal R and C to generate 32KHz±30% clock.
GSMC 0.18um 3.3v/1.8v 80mA power regulator
Present project is a regulator that generates 1.8v voltage from 3.3v power supply.
GSMC18_RCG_03 is to generate random code with the sampling clock up to 250MHz.
GSMC 0.18µm 5v-5v/3v/1.8v Power Regulator
This IP is a Low-Dropout (LDO) 5V to 5V/3V/1.8V power regulator in GSMC 0.18μm Logic/EFLASH process.
GSMC 0.18um 3.3V Power on Reset
The present Power-On-Reset circuit generates system reset pulses (RST) when the power supplier is from 1.62V to 3.6V.
GSMC 0.18μm 3.3v-1.8v Noise Current Source
GSMC18_NCS_01 is a Noise Current Source IP.
GSMC 0.18um 11Bit 500Ksps R2R DAC
GSMC18_R2RDAC_04 is a 11Bit 500KHz DAC IP.
This IP is specially designed for anti-tamper protection.
GSMC16RF process VPPIO, provides 6.5V power supply IO pads for OTP application.
VeriSilicon GSMC 0.16um RF 1.8V/3.3V VPPIO_DUP_01 IO library developed by VeriSilicon is optimized for Grace Semiconductor Manufa…
VCC Detector (VDT) circuit - voltage level of I/O (VIN) Detection
The present IP is a VCC Detector (VDT) circuit, which prevents the possibilities of causing Flash writing failure or internal ope…
GSMC 0.18um General Process, Low Power circuit design, Diffusion ROM
Based on GSMC 0.13um 1.5V/12V eFlash process, current design of the IP detects light with photodiode.
GSMC 0.13um 5v-3.3v&1.5v Power Regulator
This IP is a Low-Dropout (LDO) 5V to 3.3V&1.5V power regulator in GSMC 0.13um low power 4P5M e-flash dual gate process.