The SPI is a fully configurable SINGLE, DUAL, QUAD and OCTAL SPI master/slave device, which allows user to configure polarity and…
- SPI / QSPI XSPI
- In Production
- Immediate
- Yes
T2M GmbH is the leading Global Technology Company supplying state of the art complex semiconductor connectivity IPs and KGDs, enabling the creation of complex connected devices for Mobile, IoT and Wearable markets.
T2M's unique SoC White Box IPs are the design database of mass production RF connectivity chips supporting standards including Wifi, BT, BLE, Zigbee, NFC, LTE, GSM, GNS. They are available in source code as well as KGD for SIP / modules.
With offices in USA, Europe, China, Taiwan, South Korea, Japan, Singapore and India, T2M’s highly experienced team provides local support, accelerating product development and Time 2 Market.
The SPI is a fully configurable SINGLE, DUAL, QUAD and OCTAL SPI master/slave device, which allows user to configure polarity and…
Serial Peripheral Interface – Master/Slave with Octal, Quad, Dual and Single SPI Bus support
The SPI IP is a revolutionary octal SPI designed to offer the fastest operations available for any serial SPI memory.
LIN 2.2, 2.1 and 1.3 Protocol Controller IP
The LIN is a soft core of the Local Interconnect Network (LIN).
Used for controlling HDLC/SDLC transmission protocols
The DHDLC IP Core provides versatile support for a widely used HDLC transmission protocol.
CAN 2.0 & CAN FD Bus Controller IP
The CAN is a standalone controller for the Controller Area Network (CAN), which is commonly used in automotive and industrial app…
HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 65/55LP
HDMI transmitter PHY (Physical layer) IP core which is fully compliant with HDMI 1.4 specification.
HDMI 1.3 Tx PHY & Controller IP, Silicon Proven in TSMC 40LP
HDMI transmitter PHY (Physical layer) IP core which is fully compliant with HDMI 1.3 specification.
HDMI 1.3 Rx PHY & Controller IP, Silicon Proven in TSMC 40LP
HDMI receiver PHY (Physical layer) IP is single-port core which is fully compliant with HDMI 1.3a specification.
HDMI 1.4 Rx PHY & Controller IP, Silicon Proven in TSMC 65/55LP
HDMI receiver PHY (Physical layer) is a single-port IP core which is fully compliant with HDMI 1.4 specification.
HDMI Transmitter Link IP Core supporting the standard of HDMI 1.3a which will be quickly implemented into SoC of consumers' produ…
The CAN XL IP represents a breakthrough, bridging the gap between CAN FD and 100Mbit Ethernet.
Multi-LEO Satellite Link Emulator
In the rapidly evolving landscape of satellite communications, the demand for robust and reliable links to Low Earth Orbit (LEO) …
The NTN System Test Bench (STB) is a cost-effective, flexible environment for NTN satellite network operators or applications dev…
Centralised Real Time Processor IP Core
We provide many configurations for our cryptographic solutions based on the requirements of the project.
H.264 Audio & Video Decoder IP
The H.264 Decoder IP Core is a full-featured, easy-to-use, synthesizable design that is easily integrated into any SoC or FPGA de…
The IEC7816 Slave Controller IP Core is full-featured, easy-to-use, synthesizable designs that are easily integrated into any SoC…
Octal SPI master is full-featured, easy-to-use, synthesizable design, compatible with standard protocol of Macronix (MX66LM1G45G)…
The FSPI is a fully configurable SINGLE, DUAL, QUAD and OCTAL SPI master/slave device, which allows user to configure polarity an…
Express Serial Peripheral Interface IP Core
eSPI controller is full-featured, easy-to-use, synthesizable design, compatible with standard protocol of standard eSPI specifica…
DDR5 Memory Controller IP with Advanced Feautures
DDR5 is full-featured, easy-to-use, synthesizable design, compatible with DDR5 JESD79-5 and JESD79-5 Rev1.40 (Draft) specificatio…