Logic Design Solutions is an FPGA Design and Intellectual Property (IP) company that provides Design Services, IP (cores) and DO254 methodology to FPGA customers.
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Universal Asynchronous Receiver Transmitter
The macro M16450, implements a synchronous universal asynchronous receiver/transmitter, which provides an interface between a mic…
Universal Asynchronous Receiver / Transmitter
The macro M16550, implements a synchronous universal asynchronous receiver/transmitter, which provides an interface between a mic…
The M429GEN IP implements a synchronous single-chip ARINC 429 Transmit and Receive Controller capable of linking one CPU to one o…
The LDS NVME HOST IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD.
NVMe Host Recorder on Mini-ITX Zynq 7
The LDS NVME HOST RECORDER IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD.
SATA Host on Xilinx Zynq Artix 7
The LDS SATA 3 HOST XA7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Artix 7 speed grade 2 F…
SATA 3 HOST IP on ARRIA 10 FPGA
The LDS-SATA3-HOST-A10GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Match FIFO on a INTEL AR…
The LDS SATA 2 HOST_C5GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Match FIFO on a ALTERA C…
SATA 3 Host Controller on ARRIA V FPGA
The LDS SATA 3 HOST AR5GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA …
SATA Device Controller on Kintex 7
The LDS SATA 3 DEVICE XK7 IP incorporates the Command Layer, Transport layer, the Link layer and the PHY layer on a Xilinx Kintex…
SATA Host Controller on Spartan 6 LXT FPGA
The LDS SATA HOST SP6 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Spartan 6 FPGA.
The LDS SATA HOST STR4GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA S…
SATA Host controller on Virtex 5 FXT
The LDS SATA HOST XF5 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 5 FPGA.
Serial ATA Dual Host Controller
The LDS_SATA HOST DUAL XV5 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 5 FPGA.
The LDS SATA HOST XV5 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 5 FPGA.
EXFAT IP Soft Core for NVMe
FAT32 IP Soft Core for NVMe
ARTIX Ultra Scale Plus NVME HOST IP – Gen4
The LDS NVME HOST IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD.
Kintex Ultra Scale Plus NVMe Host IP
The LDS NVME HOST IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD.
AGILEX 7 R-Tile Gen5 NVMe Host IP
The LDS NVME HOST IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD.