Vendor: T2M GmbH Category: V-By-One

V-by-One/LVDS Tx Combo PHY, Silicon Proven in 28HPC+

V-by-One/ LVDS Tx Combo PHY IP Core aims at achieving high-speed data transmission for video signals through internal equipment c…

Overview

V-by-One/ LVDS Tx Combo PHY IP Core aims at achieving high-speed data transmission for video signals through internal equipment connections. The V-by-One® HS Standard establishes specifications for developing both transmitters and receivers. It supports speeds of up to 4Gbps per lane, with options for 8-lane and 16-lane PHY configurations for both transmission and reception. Additionally, V-by-One/ LVDS Tx Combo PHY IP for transmitter is available, comprising 20-lane (4 x 4D1C) LVDS drivers, supporting data rates of up to 1.5Gbps. These capabilities facilitate efficient and reliable data transmission, meeting the demands of modern digital video systems with enhanced performance and versatility.

Key features

  • LVDS compliant Tx
  • 4 groups of 4-Data
  • 1-Clock channels Each lane/group can be turned on/off individually Data/Clock can be assigned to any lane within the group
  • Differential polarity can be flip per lane
  • Supports from 168Mbps to 1.5Gbps data rate
  • Supports reduced swing mode
  • X7 Multiplier PLL for serial clock generation
  • Configurable analog characteristics
  • PLL loop filter
  • PLL VCO gain
  • Differential voltage Common-mode voltage
  • Pre-emphasis strength
  • Silicon Proven in TSMC 28HPC+

Block Diagram

What’s Included?

  • Datasheet
  • Integration guideline
  • GDSII or Phantom
  • GDSII Layer map table
  • CDL netlist for LVS
  • LEF Verilog behavior model
  • Liberty timing model DRC/LVS/ERC results

Specifications

Identity

Part Number
V-by-One/LVDS Tx Combo PHY in 28HPC+
Vendor
T2M GmbH
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: Germany

Learn more about V-By-One IP core

The Benefits of a Multi-Protocol PMA

At Silicon Creations, we have developed a power and area optimized, flexible and programmable PMA (Physical Medium Attachment) architecture that can be reliably ported to different process nodes and scaled across protocol generations as data rates increase. It is called the Multi-Protocol PMA, or MP-PMA for short.

Frequently asked questions about V-by-One IP cores

What is V-by-One/LVDS Tx Combo PHY, Silicon Proven in 28HPC+?

V-by-One/LVDS Tx Combo PHY, Silicon Proven in 28HPC+ is a V-By-One IP core from T2M GmbH listed on Semi IP Hub.

How should engineers evaluate this V-By-One?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this V-By-One IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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